Re: [Xen-devel] [PATCH] iommu/quirk: disable shared EPT for Sandybridge and earlier processors.

["Tian, Kevin" <kevin.tian@xxxxxxxxx>]

> From: Jan Beulich [mailto:JBeulich@xxxxxxxx]
> Sent: Thursday, December 03, 2015 4:18 PM
> 
> >>> On 03.12.15 at 03:40, <kevin.tian@xxxxxxxxx> wrote:
> > Just confirmed internally with HW team. On SNB 4KB cache is always
> > used regardless of 4KB/2MB/1GB mapping. There'd be another reason
> > for this 40% drop observation...
> 
> So when they stated that the 4k TLB gets always used, did they at
> least provide some thoughts on what else might be causing this
> severe a performance impact? Without them helping we're left
> guessing...
> 

Unfortunately no clear answer...

Thanks
Kevin

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