[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH][XSA-126] xen: limit guest control of PCI command register
>>> On 08.06.15 at 13:28, <mst@xxxxxxxxxx> wrote: > On Mon, Jun 08, 2015 at 11:55:22AM +0100, Jan Beulich wrote: >> But you asking this made me look more closely at the >> memory ranges dumped out to the ITP log: The root port has >> >> 0x20: Memory Base = 0xca40 >> 0x22: Memory Limit = 0xca40 >> 0x24: Prefetchable Mem Base = 0xca21 >> 0x26: Prefetchable Mem Limit = 0xca21 >> >> while function 0 has >> >> 0x10: Base Address Register 0 = 0xca23000c (Memory space, 64-bit access, > prefetchable) >> 0x18: Base Address Register 2 = 0xca24000c (Memory space, 64-bit access, > prefetchable) >> 0x20: Base Address Register 4 = 0xca25000c (Memory space, 64-bit access, > prefetchable) >> >> and function 1 >> >> 0x10: Base Address Register 0 = 0xca20000c (Memory space, 64-bit access, > prefetchable) >> 0x18: Base Address Register 2 = 0xca21000c (Memory space, 64-bit access, > prefetchable) > > And what is the size of this BAR? Sadly I don't seem have a matching pair of kernel and ITP logs, so I can only guess that it's 64k (or less). Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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