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Re: [Xen-devel] RFC: [PATCH 1/3] Enhance platform support for PCI

On Fri, 2015-02-20 at 14:11 +0000, Jan Beulich wrote:
> >>> On 20.02.15 at 14:45, <ian.campbell@xxxxxxxxxx> wrote:
> > (Jan, curious if you have any thoughts on this, hopefully I've left
> > sufficient context for you to get what we are on about, the gist is we
> > need some way for dom0 and Xen to agree on how a PCI segment ID maps to
> > an actual PCI root controller, I think on x86 you either Just Know from
> > PC legacy or ACPI tells you?)
> Yeah, without information from ACPI we'd have no way to know how
> to access the config space of segments other than 0. Both I/O port
> based access methods don't have room for specifying a segment
> number. Since the MMCFG addresses get set up by firmware, it is
> also firmware telling us the segment numbers. If you don't get them
> arranged in any particular order, ...
> > On Fri, 2015-02-20 at 18:31 +0530, Manish Jaggi wrote:
> >> I have added ABI that segment no maps to the position on pci node in xen 
> >> device tree. We had partially discussed about this during Linaro 
> >> connect. What is your teams view on this, should this be ok or we 
> >> introduce a property in device tree pci node {xen_segment_id = <1>}
> > 
> > The DT node ordering cannot be relied on this way, so we certainly need
> > something else.
> > 
> > Ideally we should find a solution which doesn't require new properties.
> > 
> > The best solution would be to find some existing property of the PCI
> > host controller which is well defined and unique to each host
> > controller. I had been thinking that the base address of the PCI CFG
> > space might be a good enough handle.
> ... this approach would seem reasonable.
> > The only question is whether the data type used for segment id in the
> > hypercall ABI is wide enough for this, and it seems to be u16 :-(. I'm
> > not sure if we are going to be able to make this pci_segment_t and have
> > it differ for ARM.
> Are you expecting to have more than 64k segments?

If we were to use the PCI CFG base address as the "handle" for a segment
then we would need a 64 bit field is all, it would of course be very
sparse ;-).

> Otherwise,
> just sequentially assign segment numbers as you discover them or
> get them reported by Dom0. You could even have Dom0 tell you
> the segment numbers (just like we do on x86),

Aha, how does this work on x86 then? I've been looking for a hypercall
which dom0 uses to tell Xen about PCI segments to no avail (I just find
ones for registering actual devices).

If there is an existing mechanism on x86 and it suits (or nearly so)
then I am entirely in favour of using it.


>  thus eliminating the
> need for an extra mechanism for Dom0 to learn them.
> Jan

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