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Re: [Xen-devel] [PATCH RFC v2 1/4] x86/mm: Shadow and p2m changes for PV mem_access

>>>That's what you need to figure out. The simplistic solution (single
>>>stepping just the critical instruction(s)) is probably not going to be
>>>acceptable due to its fragility. I have no good other suggestions, but
>>>I'm not eager to allow code in that weakens protection.
>> From the debugging I have done to get this working, this is what the
>> flow should be. Xen tries to write to guest page marked read only and
>> page fault occurs. So __copy_to_user_ll() ->
>> handle_exception_saved->do_page_fault() and CR0.WP is cleared. Once
>> the fault is handled __copy_to_user_ll() is retried and it goes
>> through. At the end of which CR0.WP is turned on. So this is the only
>> window that pv_vcpu.need_cr0_wp_set should be true. Is there a spot
>> outside of this window that I check to see if it is set and if it is, turn 
>> it back on
>again? Would that be a sufficient bound?
>That's the obvious (direct) path. What you leave aside are any interrupts
>occurring in between.

True. I was thinking about disabling interrupts in this window but that 
wouldn't account for non-maskable ones. This is going to be a tough nut to 


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