[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support
On 2014/6/25 17:54, Paolo Bonzini wrote: Il 25/06/2014 11:50, Chen, Tiejun ha scritto:For past devices, we know which BARs they use. For future devices, it would be nice if the PCH/MCH backdoor was specified so that we know they will leave a free BAR for virtualization.Now I'm a bit confused about BAR here. You're saying we will reserve a free BAR to address those information to expose to guest, but which device does this free BAR belong to? The video device? Or PCH/MCH?The video device. If the host device does not have the BAR (which will be the common case), QEMU can emulate it like this: According to some feedback, neither we have any unused PCI unused config offset, nor BAR. - offsets 0x0000..0x0fff map to configuration space of the host MCH Are you saying the config space in the video device? but will this overlap? Every PCIe device already have a 4K config space, right? So we should extend these two ranges: 0x0000..0x0fff: the standard PCIe config space in the video device 0x1000..0x1fff: map to configuration of the real host bridge 0x2000..0x2fff: map to configuration of the real ISA bridge Right?But as you know, we just need to expose a little config space from the real host bridge and the real ISA bridge, so this may be waste with 8K. Thanks Tiejun - offsets 0x1000..0x1fff map to configuration space of the host PCH Of course this is only limited to offsets that are needed by the driver. Paolo _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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