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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v5 17/21] xen/arm: Add support for GIC v3
Hi Vijay, On 12/06/14 14:36, vijay.kilari@xxxxxxxxx wrote: From: Vijaya Kumar K <Vijaya.Kumar@xxxxxxxxxxxxxxxxxx> Add support for GIC v3 specification System register access(SRE) is enabled to access cpu and virtual interface regiseters based s/regiseters/registers/ [..] GICV3_GICR_PIDR2 is used for the emulation. You can't use this value to test hardware stuff. Please use 0x30 (GICv3) which is clearer. [..] For hardware "feature" checking, it's *better* to print a correct error message than ASSERT (which is not enabled on non-debug build). [..] Why a dsb here? I don't think it's useful there. ~0xff???? Can't we use a define here? Or at least a comment explain why this value. [..] We require to call this function with the desc->lock locked. Please add an ASSERT here: ASSERT(spin_is_locked(&desc->lock)); [..] ASSERT(spin_is_locked(&desc->lock)); [..] As said on V4, you have to cc the relevant maintainers for every file you've modified... (I didn't cced them this time) -- Julien Grall _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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