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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v4 2/4] xen/arm: inflight irqs during migration
On Wed, 11 Jun 2014, Julien Grall wrote:
> On 06/11/2014 03:49 PM, Stefano Stabellini wrote:
> > On Wed, 11 Jun 2014, Julien Grall wrote:
> >> On 06/11/2014 03:15 PM, Stefano Stabellini wrote:
> >>>>> + {
> >>>>> + unsigned int irq, target, old_target;
> >>>>> + struct vcpu *v_target, *v_old;
> >>>>> +
> >>>>> + target = i % 8;
> >>>>> +
> >>>>> + irq = offset + (i / 8);
> >>>>> + v_target = v->domain->vcpu[target];
> >>>>> + old_target = byte_read(rank->itargets[REG_RANK_INDEX(8,
> >>>>> gicd_reg - GICD_ITARGETSR)], 0, i/8);
> >>>>> + v_old = v->domain->vcpu[old_target];
> >>>>
> >>>> v_target and v_old might be the same.
> >>>
> >>> No, they could not: if they were find_next_bit wouldn't find the bit set.
> >>
> >> Even though v_target is always != v_old (because of the tr = r & ~val
> >> stuff), why do you migrate if the old_target will be in the new mask?
> >
> > We need to be consistent: always the lowest vcpu in the mask.
>
> It's not the case here. AFAIU tr only contains the list of VPCU that are
> not yet in this register.
>
> The old vcpu can have an cpuid lower than the new vcpu. In this case,
> you won't respect your consistency.
You are right. I'll rewrite this code.
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