Re: [Xen-devel] MPIDR register usage in ARMv8

[Ian Campbell <Ian.Campbell@xxxxxxxxxx>]

On Wed, 2014-04-16 at 11:23 +0530, Vijay Kilari wrote:
> Hi Ian,
> 
> I understand that arm64/head.S is using MPIDR definitions
> from xen/include/asm-arm/processor.h which is valid for arm32 but
> not for ARMv8 as below
> 
> /* MPIDR Multiprocessor Affinity Register */
> #define _MPIDR_UP           (30)
> #define MPIDR_UP            (_AC(1,U) << _MPIDR_UP)
> #define _MPIDR_SMP          (31)
> #define MPIDR_SMP           (_AC(1,U) << _MPIDR_SMP)
> #define MPIDR_AFF0_SHIFT    (0)
> #define MPIDR_AFF0_MASK     (_AC(0xff,U) << MPIDR_AFF0_SHIFT)
> #define MPIDR_HWID_MASK     _AC(0xffffff,U)
> #define MPIDR_INVALID       (~MPIDR_HWID_MASK)
> 
> The same is used in arm64/head.S checking for bit 31 (_MPIDR_SMP) which is not
> valid in MPIDR_EL1 register definition

It's mostly there for symmetry with the arm32 code, and since arm64
mandates read-as-one (not strictly speaking invalid) to match the
meaning of the bit patterns on arm32 to the requirements of arm64 I
think it is mostly harmless and I suppose it is future proof against the
possibility that future v8 revisions might reintroduce the meanings of
those bits.

>  also MPIDR_HWID_MASK should
> be updated for ARMv8

No harm in adding AFF3 into the mix I suppose.

> 
> arm64/head.s:
> 
>         mrs   x0, mpidr_el1
>         tbz   x0, _MPIDR_SMP, 1f     /* Multiprocessor extension not
> supported? */
>         tbnz  x0, _MPIDR_UP, 1f      /* Uniprocessor system? */
> 
>         mov   x13, #(~MPIDR_HWID_MASK)
>         bic   x24, x0, x13           /* Mask out flags to get CPU ID */
> 1:
> 
> Do you agree that this requires change?




_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxx
http://lists.xen.org/xen-devel