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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH] xen/arm: Don't set the ACTLR SMP bit for 64 bit guests
The ACTLR register is implementation defined. The SMP bit is CA15 and CA7
specific. Also replace ACTLR_CA15_SMP by ACTLR_V7_SMP.
Signed-off-by: Julien Grall <julien.grall@xxxxxxxxxx>
---
xen/arch/arm/domain.c | 18 +++++++++++++-----
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index cb0424d..00f2d14 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -470,11 +470,19 @@ int vcpu_initialise(struct vcpu *v)
v->arch.actlr = READ_SYSREG32(ACTLR_EL1);
- /* XXX: Handle other than CA15 cpus */
- if ( v->domain->max_vcpus > 1 )
- v->arch.actlr |= ACTLR_CA15_SMP;
- else
- v->arch.actlr &= ~ACTLR_CA15_SMP;
+ if ( is_pv32_domain(v->domain) )
+ {
+ /*
+ * ACTLR is implementation defined. For CA7 and CA15, the SMP
+ * is always at the same position.
+ * Enable SMP bit if the domain has more than 1 VCPU
+ * TODO: Handle others CPUs (ie non CA7 and CA15)
+ */
+ if ( v->domain->max_vcpus > 1 )
+ v->arch.actlr |= ACTLR_V7_SMP;
+ else
+ v->arch.actlr &= ~ACTLR_V7_SMP;
+ }
if ( (rc = vcpu_vgic_init(v)) != 0 )
return rc;
--
1.7.10.4
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