Re: [Xen-devel] [PATCH 1/2 v5] iommu/amd: Fix logic for clearing the IOMMU interrupt bits

[Suravee Suthikulanit <suravee.suthikulpanit@xxxxxxx>]

On 6/13/2013 10:58 AM, Jan Beulich wrote:
> > > > On 13.06.13 at 03:44, Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx> 
> > > > wrote:
> > The following commit broke the IOMMU MSI interrupt:
> >
> > 2012-11-28    899110e3f6d2a191638e8b50a981c551eeec49e6 AMD IOMMU:
> > include IOMMU interrupt information in 'M' debug key output
> > (http://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=899110e3f6d2a191638e8b5
> > 0a981c551eeec49e6)
> Having gone over the changes again, this still looks pretty innocent/
> mechanical to me - I can't see what may have got broken.
> Considering that this is the change adding respective information to
> 'M' output - what does 'M' show for the IOMMU entry/entries?
>
> Jan
Basically, the only different is this line that only appears in the "Bad" 
version.

    (XEN)  MSI     56 vec=28  fixed  edge deassert phys    cpu dest=00000001 
mask=0/0/1

"xl debug-key i" also show the following information

    (XEN)    IRQ:  56 affinity:1 vec:28 type=AMD-IOMMU-MSI   status=00000000 
mapped, unbound

Not sure what "status=0" means.
  
Before: (Good)
(XEN) MSI information:
(XEN)  MSI     57 vec=c0 lowest  edge   assert  log lowest dest=00000001 
mask=0/1/1
(XEN)  MSI     58 vec=c8 lowest  edge   assert  log lowest dest=00000001 
mask=0/1/1
(XEN)  MSI     59 vec=d0 lowest  edge   assert  log lowest dest=00000001 
mask=0/1/1
(XEN)  MSI     60 vec=d8 lowest  edge   assert  log lowest dest=00000001 
mask=0/1/1
(XEN)  MSI     61 vec=29 lowest  edge   assert  log lowest dest=00000001 
mask=0/1/1
(XEN)  MSI-X   62 vec=31 lowest  edge   assert  log lowest dest=00000001 
mask=1/0/0
(XEN)  MSI-X   63 vec=39 lowest  edge   assert  log lowest dest=00000001 
mask=1/0/0
(XEN)  MSI-X   64 vec=41 lowest  edge   assert  log lowest dest=00000001 
mask=1/0/0
(XEN)  MSI-X   65 vec=49 lowest  edge   assert  log lowest dest=00000001 
mask=1/0/0
(XEN)  MSI-X   66 vec=51 lowest  edge   assert  log lowest dest=00000001 
mask=1/0/0
(XEN)  MSI-X   67 vec=59 lowest  edge   assert  log lowest dest=00000001 
mask=1/0/0
(XEN)  MSI     68 vec=69 lowest  edge   assert  log lowest dest=00000001 
mask=0/1/1
(XEN)  MSI-X   69 vec=79 lowest  edge   assert  log lowest dest=00000003 
mask=1/1/1
(XEN)  MSI-X   70 vec=81 lowest  edge   assert  log lowest dest=00000003 
mask=1/1/1
(XEN)  MSI-X   71 vec=89 lowest  edge   assert  log lowest dest=00000003 
mask=1/1/1
(XEN)  MSI-X   72 vec=99 lowest  edge   assert  log lowest dest=00000001 
mask=1/0/0
(XEN)  MSI-X   73 vec=a1 lowest  edge   assert  log lowest dest=00000002 
mask=1/0/0
(XEN)  MSI-X   74 vec=a9 lowest  edge   assert  log lowest dest=00000001 
mask=1/0/0
(XEN)  MSI     75 vec=b9 lowest  edge   assert  log lowest dest=00000001 
mask=0/1/1
(XEN)  MSI     76 vec=c1 lowest  edge   assert  log lowest dest=00000001 
mask=0/1/1


After: (Bad)
(XEN) MSI information:
(XEN)  MSI     56 vec=28  fixed  edge deassert phys    cpu dest=00000001 
mask=0/0/1
(XEN)  MSI     57 vec=c0 lowest  edge   assert  log lowest dest=00000001 
mask=0/1/1
(XEN)  MSI     58 vec=c8 lowest  edge   assert  log lowest dest=00000001 
mask=0/1/1
(XEN)  MSI     59 vec=d0 lowest  edge   assert  log lowest dest=00000001 
mask=0/1/1
(XEN)  MSI     60 vec=d8 lowest  edge   assert  log lowest dest=00000001 
mask=0/1/1
(XEN)  MSI     61 vec=29 lowest  edge   assert  log lowest dest=00000001 
mask=0/1/1
(XEN)  MSI-X   62 vec=31 lowest  edge   assert  log lowest dest=00000001 
mask=1/0/0
(XEN)  MSI-X   63 vec=39 lowest  edge   assert  log lowest dest=00000001 
mask=1/0/0
(XEN)  MSI-X   64 vec=41 lowest  edge   assert  log lowest dest=00000001 
mask=1/0/0
(XEN)  MSI-X   65 vec=49 lowest  edge   assert  log lowest dest=00000001 
mask=1/0/0
(XEN)  MSI-X   66 vec=51 lowest  edge   assert  log lowest dest=00000001 
mask=1/0/0
(XEN)  MSI-X   67 vec=59 lowest  edge   assert  log lowest dest=00000001 
mask=1/0/0
(XEN)  MSI     68 vec=71 lowest  edge   assert  log lowest dest=00000001 
mask=0/1/1
(XEN)  MSI-X   69 vec=79 lowest  edge   assert  log lowest dest=00000003 
mask=1/1/1
(XEN)  MSI-X   70 vec=81 lowest  edge   assert  log lowest dest=00000003 
mask=1/1/1
(XEN)  MSI-X   71 vec=89 lowest  edge   assert  log lowest dest=00000003 
mask=1/1/1
(XEN)  MSI-X   72 vec=99 lowest  edge   assert  log lowest dest=00000001 
mask=1/0/0
(XEN)  MSI-X   73 vec=a1 lowest  edge   assert  log lowest dest=00000002 
mask=1/0/0
(XEN)  MSI-X   74 vec=a9 lowest  edge   assert  log lowest dest=00000001 
mask=1/0/0
(XEN)  MSI     75 vec=b9 lowest  edge   assert  log lowest dest=00000001 
mask=0/1/1
(XEN)  MSI     76 vec=c1 lowest  edge   assert  log lowest dest=00000001 
mask=0/1/1

Suravee



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