[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] LVTPC masking in Intel VPMU code
Hi, Jan, This is a pretty old code. :) I did not copy or borrow the oprofile and perf code at all. Thus, I am not aware of the quirk. (Actually, I don't know what quirk you mean). For Xen's PMI handler, I just unmask the source and deliver a virtual one. Here in this code, I see I unmasked the physical one and mask the virtual LVTPC. Can you tell me more about the oprofile/perf background? Shan Haitao -----Original Message----- From: Jan Beulich [mailto:JBeulich@xxxxxxxx] Sent: Thursday, March 28, 2013 7:26 PM To: Shan, Haitao Cc: xen-devel; Boris Ostrovsky Subject: Re: [Xen-devel] LVTPC masking in Intel VPMU code >>> On 27.03.13 at 22:34, Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx> wrote: > Can someone explain why we have these lines in > vpmu_core2.c:core2_vpmu_do_interrupt(): > apic_write_around(APIC_LVTPC, apic_read(APIC_LVTPC) & > ~APIC_LVT_MASKED); > ... > vlapic_set_reg(vlapic, APIC_LVTPC, vlapic_lvtpc | APIC_LVT_MASKED); > > There is similar code in Linux oprofile with a comment that this is done > due to some sort of > a quirk on P4 and PentiumM. Is this why it's in > core2_vpmu_do_interrupt() as well? > > I don't see a quirk like this in Linux perf code. Haitao, you contributed that code a long while back. Any comment? Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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