[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] LVTPC masking in Intel VPMU code
>>> On 27.03.13 at 22:34, Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx> wrote: > Can someone explain why we have these lines in > vpmu_core2.c:core2_vpmu_do_interrupt(): > apic_write_around(APIC_LVTPC, apic_read(APIC_LVTPC) & > ~APIC_LVT_MASKED); > ... > vlapic_set_reg(vlapic, APIC_LVTPC, vlapic_lvtpc | APIC_LVT_MASKED); > > There is similar code in Linux oprofile with a comment that this is done > due to some sort of > a quirk on P4 and PentiumM. Is this why it's in > core2_vpmu_do_interrupt() as well? > > I don't see a quirk like this in Linux perf code. Haitao, you contributed that code a long while back. Any comment? Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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