[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Xen-devel] [PATCH 00/14] xen: arm: 64-bit dom0 kernel support



On Tue, 2013-03-12 at 14:53 +0000, Ian Campbell wrote:
> 
> I haven't yet tried a guest (even 32-bit) on top of this kernel, I
> know for a fact that the kernel side of this work isn't up to it
> (mainly because no sync bitops -> no event channels). 

So here is that skanky patch. It is based on:
        commit d3fbfe7fbaa68ee918fd62c385b40d233d5c631d
        Author: Will Deacon <will.deacon@xxxxxxx>
        Date:   Mon Jan 28 12:06:58 2013 +0000
        
            amba-clcd: separate ioremap framebuffer from DMA implementation
            
As well I hinted above evtchn stuff isn't expected to work due to lack
of asm optimised bitops on ARM causing a fallback to a spinlock based
thing which is no use for talking to the h/v.

I've also hacked around the arch/arm arch/arm64 in the worst possible
ways (where multiple worst options exist I have endeavoured to use both
possible techniques ;-)). We need to decide how to deal with this --
drivers/xen/arm or virt/xen/arm seem like contenders. Tricks based on
-I../../../ etc have been used elsewhere in the kernel but aren't
popular.

It should be pretty obvious this is just a dump, only reason I'm sending
it out is for reference since I'm going AFK for 3 weeks soon, perhaps
someone else will do the kernel side while I'm away, if not I'll pick it
up when I get back.

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ef14873..f1f3706 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1860,8 +1860,9 @@ config XEN_DOM0
 
 config XEN
        bool "Xen guest support on ARM (EXPERIMENTAL)"
-       depends on EXPERIMENTAL && ARM && OF
+       depends on EXPERIMENTAL && ARM && AEABI && OF
        depends on CPU_V7 && !CPU_V6
+       depends on !GENERIC_ATOMIC64
        help
          Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
 
diff --git a/arch/arm/include/asm/xen/events.h 
b/arch/arm/include/asm/xen/events.h
index e86a1b3..8b1f37b 100644
--- a/arch/arm/include/asm/xen/events.h
+++ b/arch/arm/include/asm/xen/events.h
@@ -16,6 +16,8 @@ static inline int xen_irqs_disabled(struct pt_regs *regs)
        return raw_irqs_disabled_flags(regs->ARM_cpsr);
 }
 
-#define xchg_xen_ulong(ptr, val) atomic64_xchg((atomic64_t *)(ptr), (val))
+#define xchg_xen_ulong(ptr, val) atomic64_xchg(container_of((ptr),     \
+                                                           atomic64_t, \
+                                                           counter), (val))
 
 #endif /* _ASM_ARM_XEN_EVENTS_H */
diff --git a/arch/arm/include/asm/xen/page.h b/arch/arm/include/asm/xen/page.h
index 30cdacb..0ef7370 100644
--- a/arch/arm/include/asm/xen/page.h
+++ b/arch/arm/include/asm/xen/page.h
@@ -1,7 +1,7 @@
 #ifndef _ASM_ARM_XEN_PAGE_H
 #define _ASM_ARM_XEN_PAGE_H
 
-#include <asm/mach/map.h>
+//#include <asm/mach/map.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
 
@@ -88,6 +88,10 @@ static inline bool set_phys_to_machine(unsigned long pfn, 
unsigned long mfn)
        return __set_phys_to_machine(pfn, mfn);
 }
 
+#ifdef CONFIG_ARM64
+#define xen_remap(cookie, size) __ioremap((cookie), (size), 
__pgprot(PROT_NORMAL_HACK))
+#else
 #define xen_remap(cookie, size) __arm_ioremap((cookie), (size), MT_MEMORY);
+#endif
 
 #endif /* _ASM_ARM_XEN_PAGE_H */
diff --git a/arch/arm/xen/hypercall.S b/arch/arm/xen/hypercall.S
index 71f7239..cadf0c0 100644
--- a/arch/arm/xen/hypercall.S
+++ b/arch/arm/xen/hypercall.S
@@ -31,34 +31,52 @@
  */
 
 /*
- * The Xen hypercall calling convention is very similar to the ARM
- * procedure calling convention: the first paramter is passed in r0, the
- * second in r1, the third in r2 and the fourth in r3. Considering that
+ * The Xen hypercall calling convention is very similar to the ARM EABI
+ * procedure calling convention: the first paramter is passed in x0/r0, the
+ * second in x1/r1, the third in x2/r2 and the fourth in x3/r3. Considering 
that
  * Xen hypercalls have 5 arguments at most, the fifth paramter is passed
- * in r4, differently from the procedure calling convention of using the
+ * in x4/r4, differently from the procedure calling convention of using the
  * stack for that case.
  *
- * The hypercall number is passed in r12.
+ * The hypercall number is passed in r12 (arm) or x16 (arm64). In both cases 
the
+ * relevant ARM procedure calling convention specifies this is an
+ * inter-procedure-call scratch register (e.g. for use in linker
+ * stubs). This use does not conflict with use during a hypercall.
  *
- * The return value is in r0.
+ * The return value is in r0/x0.
  *
  * The hvc ISS is required to be 0xEA1, that is the Xen specific ARM
  * hypercall tag.
+ *
+ * Parameter structs passed to hypercalls are laid out according to
+       the ARM EABI standard.
  */
 
 #include <linux/linkage.h>
 #include <asm/assembler.h>
-#include <asm/opcodes-virt.h>
 #include <xen/interface/xen.h>
 
-
 #define XEN_IMM 0xEA1
 
+#ifdef CONFIG_ARM
+
+#include <asm/opcodes-virt.h>
+
+#define HYPERCALL_REG r12
+#define RET mov pc,lr
+       
+#else
+
+#define HYPERCALL_REG x16
+#define __HVC(x) hvc x
+#define RET ret
+#endif
+       
 #define HYPERCALL_SIMPLE(hypercall)            \
 ENTRY(HYPERVISOR_##hypercall)                  \
-       mov r12, #__HYPERVISOR_##hypercall;     \
+       mov HYPERCALL_REG, #__HYPERVISOR_##hypercall;   \
        __HVC(XEN_IMM);                                         \
-       mov pc, lr;                                                     \
+       RET;                                                    \
 ENDPROC(HYPERVISOR_##hypercall)
 
 #define HYPERCALL0 HYPERCALL_SIMPLE
@@ -67,6 +85,7 @@ ENDPROC(HYPERVISOR_##hypercall)
 #define HYPERCALL3 HYPERCALL_SIMPLE
 #define HYPERCALL4 HYPERCALL_SIMPLE
 
+#ifdef CONFIG_ARM
 #define HYPERCALL5(hypercall)                  \
 ENTRY(HYPERVISOR_##hypercall)                  \
        stmdb sp!, {r4}                                         \
@@ -74,9 +93,12 @@ ENTRY(HYPERVISOR_##hypercall)                        \
        mov r12, #__HYPERVISOR_##hypercall;     \
        __HVC(XEN_IMM);                                         \
        ldm sp!, {r4}                                           \
-       mov pc, lr                                                      \
+       RET                                                     \
 ENDPROC(HYPERVISOR_##hypercall)
-
+#else
+       /*XXX*/
+#endif
+       
                 .text
 
 HYPERCALL2(xen_version);
@@ -88,6 +110,7 @@ HYPERCALL2(hvm_op);
 HYPERCALL2(memory_op);
 HYPERCALL2(physdev_op);
 
+#ifdef CONFIG_ARM
 ENTRY(privcmd_call)
        stmdb sp!, {r4}
        mov r12, r0
@@ -100,3 +123,17 @@ ENTRY(privcmd_call)
        ldm sp!, {r4}
        mov pc, lr
 ENDPROC(privcmd_call);
+#else
+ENTRY(privcmd_call)
+       push x4, xzr
+       mov x12, x0
+       mov x0, x1
+       mov x1, x2
+       mov x2, x3
+       ldr x3, [sp, #8]
+       ldr x4, [sp, #4]
+       __HVC(XEN_IMM)
+       pop x5, xzr
+       ret
+ENDPROC(privcmd_call);
+#endif
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index f683721..d7d7b02 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -189,6 +189,25 @@ config HW_PERF_EVENTS
 
 source "mm/Kconfig"
 
+config XEN_DOM0
+        def_bool y
+        depends on XEN
+
+config XEN
+        bool "Xen guest support on ARM64 (EXPERIMENTAL)"
+        depends on EXPERIMENTAL && ARM64 && OF
+        #depends on CPU_V7 && !CPU_V6
+        help
+          Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
+
+
+          This option is EXPERIMENTAL because the hypervisor
+          interfaces which it uses are not yet considered stable
+          therefore backwards and forwards compatibility is not yet
+          guaranteed.
+
+          If unsure, say N.
+
 endmenu
 
 menu "Boot options"
diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
index c95c5cb..8084cb3 100644
--- a/arch/arm64/Makefile
+++ b/arch/arm64/Makefile
@@ -37,6 +37,7 @@ TEXT_OFFSET := 0x00080000
 export TEXT_OFFSET GZFLAGS
 
 core-y         += arch/arm64/kernel/ arch/arm64/mm/
+core-$(CONFIG_XEN)              += arch/arm/xen/
 libs-y         := arch/arm64/lib/ $(libs-y)
 libs-y         += $(LIBGCC)
 
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index c343448..eb31952 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -1,4 +1,5 @@
 dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb
+dtb-y += foundation-v8.dtb
 
 targets += dtbs
 targets += $(dtb-y)
diff --git a/arch/arm64/boot/dts/foundation-v8.dts 
b/arch/arm64/boot/dts/foundation-v8.dts
new file mode 100644
index 0000000..33dc3ff
--- /dev/null
+++ b/arch/arm64/boot/dts/foundation-v8.dts
@@ -0,0 +1,207 @@
+/*
+ * ARM Ltd.
+ *
+ * RTSM Foundation v8 platform (model)
+ *
+ * A very stripped down Versatile Express inspired platform
+ *
+ */
+
+/dts-v1/;
+
+/ {
+       #address-cells = <2>;
+       #size-cells = <1>;
+       model = "V2P-AARCH64";
+       compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
+       interrupt-parent = <&gic>;
+
+       chosen {
+               bootargs = "dom0_mem=128M dom0_max_vcpus=1 console=com1,vga";
+               xen,dom0-bootargs = "earlyprintk=xenboot console=ttyAMA1 
root=/dev/mmcblk0 debug rw init=/root/init.sh";
+       };
+
+       aliases {
+               serial0 = &v2m_serial0;
+               serial1 = &v2m_serial1;
+               serial2 = &v2m_serial2;
+               serial3 = &v2m_serial3;
+       };
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,armv8";
+                       reg = <0>;
+                       enable-method = "spin-table";
+                       cpu-release-addr = <0x0 0x8000fff8>;
+               };
+//             cpu@1 {
+//                     device_type = "cpu";
+//                     compatible = "arm,armv8";
+//                     reg = <1>;
+//                     enable-method = "spin-table";
+//                     cpu-release-addr = <0x0 0x8000fff8>;
+//             };
+//             cpu@2 {
+//                     device_type = "cpu";
+//                     compatible = "arm,armv8";
+//                     reg = <2>;
+//                     enable-method = "spin-table";
+//                     cpu-release-addr = <0x0 0x8000fff8>;
+//             };
+//             cpu@3 {
+//                     device_type = "cpu";
+//                     compatible = "arm,armv8";
+//                     reg = <3>;
+//                     enable-method = "spin-table";
+//                     cpu-release-addr = <0x0 0x8000fff8>;
+//             };
+       };
+
+       memory@80000000 {
+               device_type = "memory";
+               reg = < 0x00000000 0x80000000 0x80000000 >;
+//                     0x00000008 0x80000000 0x80000000 >;
+       };
+        hypervisor {
+                compatible = "xen,xen-4.2", "xen,xen";
+                /* this field is going to be adjusted by the hypervisor */
+                reg = <0 0xb0000000 0x20000>;
+                /* this field is going to be adjusted by the hypervisor */
+                interrupts = <1 15 0xf08>;
+        };
+
+
+       gic: interrupt-controller@2c001000 {
+               compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+               #interrupt-cells = <3>;
+               #address-cells = <0>;
+               interrupt-controller;
+               reg = <0 0x2c001000 0x1000>,
+                     <0 0x2c002000 0x1000>,
+                     <0 0x2c004000 0x2000>,
+                     <0 0x2c006000 0x2000>;
+       };
+
+       pmu {
+               compatible = "arm,armv8-pmuv3";
+               interrupts = <0 60 4  0 61 4  0 62 4  0 63 4>;
+       };
+
+       timer {
+               compatible = "arm,armv8-timer";
+               interrupts = <1 14 0xff01>;
+               clock-frequency = <100000000>;
+       };
+
+       motherboard {
+               compatible = "simple-bus";
+               arm,v2m-memory-map = "rs1";
+               #address-cells = <2>; /* SMB chipselect number and offset */
+               #size-cells = <1>;
+               #interrupt-cells = <1>;
+
+               interrupt-map-mask = <0 0 63>;
+               interrupt-map = <0 0  0 &gic 0  0 4>,
+                               <0 0  1 &gic 0  1 4>,
+                               <0 0  2 &gic 0  2 4>,
+                               <0 0  3 &gic 0  3 4>,
+                               <0 0  4 &gic 0  4 4>,
+                               <0 0  5 &gic 0  5 4>,
+                               <0 0  6 &gic 0  6 4>,
+                               <0 0  7 &gic 0  7 4>,
+                               <0 0  8 &gic 0  8 4>,
+                               <0 0  9 &gic 0  9 4>,
+                               <0 0 10 &gic 0 10 4>,
+                               <0 0 11 &gic 0 11 4>,
+                               <0 0 12 &gic 0 12 4>,
+                               <0 0 13 &gic 0 13 4>,
+                               <0 0 14 &gic 0 14 4>,
+                               <0 0 15 &gic 0 15 4>,
+                               <0 0 16 &gic 0 16 4>,
+                               <0 0 17 &gic 0 17 4>,
+                               <0 0 18 &gic 0 18 4>,
+                               <0 0 19 &gic 0 19 4>,
+                               <0 0 20 &gic 0 20 4>,
+                               <0 0 21 &gic 0 21 4>,
+                               <0 0 22 &gic 0 22 4>,
+                               <0 0 23 &gic 0 23 4>,
+                               <0 0 24 &gic 0 24 4>,
+                               <0 0 25 &gic 0 25 4>,
+                               <0 0 26 &gic 0 26 4>,
+                               <0 0 27 &gic 0 27 4>,
+                               <0 0 28 &gic 0 28 4>,
+                               <0 0 29 &gic 0 29 4>,
+                               <0 0 30 &gic 0 30 4>,
+                               <0 0 31 &gic 0 31 4>,
+                               <0 0 32 &gic 0 32 4>,
+                               <0 0 33 &gic 0 33 4>,
+                               <0 0 34 &gic 0 34 4>,
+                               <0 0 35 &gic 0 35 4>,
+                               <0 0 36 &gic 0 36 4>,
+                               <0 0 37 &gic 0 37 4>,
+                               <0 0 38 &gic 0 38 4>,
+                               <0 0 39 &gic 0 39 4>,
+                               <0 0 40 &gic 0 40 4>,
+                               <0 0 41 &gic 0 41 4>,
+                               <0 0 42 &gic 0 42 4>;
+
+               ranges = <2 0 0x0 0x18000000 0x04000000>,
+                            <3 0 0x0 0x1c000000 0x04000000>;
+
+               ethernet@2,02000000 {
+                       compatible = "smsc,lan91c111";
+                       reg = <2 0x02000000 0x10000>;
+                       interrupts = <15>;
+               };
+
+               iofpga@3,00000000 {
+                       compatible = "arm,amba-bus", "simple-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 3 0 0x200000>;
+
+                       sysreg@010000 {
+                               compatible = "arm,vexpress-sysreg";
+                               reg = <0x010000 0x1000>;
+                       };
+
+                       v2m_serial0: uart@090000 {
+                               compatible = "arm,pl011", "arm,primecell";
+                               reg = <0x090000 0x1000>;
+                               interrupts = <5>;
+                       };
+
+                       v2m_serial1: uart@0a0000 {
+                               compatible = "arm,pl011", "arm,primecell";
+                               reg = <0x0a0000 0x1000>;
+                               interrupts = <6>;
+                       };
+
+                       v2m_serial2: uart@0b0000 {
+                               compatible = "arm,pl011", "arm,primecell";
+                               reg = <0x0b0000 0x1000>;
+                               interrupts = <7>;
+                       };
+
+                       v2m_serial3: uart@0c0000 {
+                               compatible = "arm,pl011", "arm,primecell";
+                               reg = <0x0c0000 0x1000>;
+                               interrupts = <8>;
+                       };
+
+                       virtio_block@0130000 {
+                               compatible = "virtio,mmio";
+                               reg = <0x130000 0x1000>;
+                               interrupts = <42>;
+                       };
+               };
+       };
+
+       /* chosen */
+};
+
diff --git a/arch/arm64/boot/dts/rtsm_ve-aemv8a.dts 
b/arch/arm64/boot/dts/rtsm_ve-aemv8a.dts
index 89c3065..d583ff8 100644
--- a/arch/arm64/boot/dts/rtsm_ve-aemv8a.dts
+++ b/arch/arm64/boot/dts/rtsm_ve-aemv8a.dts
@@ -21,7 +21,20 @@
        #address-cells = <2>;
        #size-cells = <2>;
 
-       chosen { };
+       chosen {
+                 bootargs = "dom0_mem=128M dom0_max_vcpus=1 console=com1,vga";
+                 xen,dom0-bootargs = "earlyprintk=xenboot console=ttyAMA1 
root=/dev/mmcblk0 debug rw init=/root/init.sh";
+//                 bootargs = "console=ttyAMA0 earlyprintk=pl011,0x1c090000 
root=/dev/mmcblk0 debug rw init=/root/init.sh";
+                 /*xen,dom0-bootargs = "earlyprintk=xenboot console=hvc0 
root=/dev/mmcblk0 debug rw init=/root/init.sh";*/
+        };
+       hypervisor {
+               compatible = "xen,xen-4.2", "xen,xen";
+               /* this field is going to be adjusted by the hypervisor */
+               reg = <0 0xb0000000 0 0x20000>;
+               /* this field is going to be adjusted by the hypervisor */
+               interrupts = <1 15 0xf08>;
+       };
+
 
        aliases {
                serial0 = &v2m_serial0;
@@ -41,33 +54,11 @@
                        enable-method = "spin-table";
                        cpu-release-addr = <0x0 0x8000fff8>;
                };
-               cpu@1 {
-                       device_type = "cpu";
-                       compatible = "arm,armv8";
-                       reg = <1>;
-                       enable-method = "spin-table";
-                       cpu-release-addr = <0x0 0x8000fff8>;
-               };
-               cpu@2 {
-                       device_type = "cpu";
-                       compatible = "arm,armv8";
-                       reg = <2>;
-                       enable-method = "spin-table";
-                       cpu-release-addr = <0x0 0x8000fff8>;
-               };
-               cpu@3 {
-                       device_type = "cpu";
-                       compatible = "arm,armv8";
-                       reg = <3>;
-                       enable-method = "spin-table";
-                       cpu-release-addr = <0x0 0x8000fff8>;
-               };
        };
 
        memory@80000000 {
                device_type = "memory";
-               reg = <0x00000000 0x80000000 0 0x80000000>,
-                     <0x00000008 0x80000000 0 0x80000000>;
+               reg = <0x00000000 0x80000000 0 0x80000000>;
        };
 
        gic: interrupt-controller@2c001000 {
@@ -76,7 +67,9 @@
                #address-cells = <0>;
                interrupt-controller;
                reg = <0 0x2c001000 0 0x1000>,
-                     <0 0x2c002000 0 0x100>;
+                     <0 0x2c002000 0 0x100>,
+                     <0 0x2c004000 0 0x2000>,
+                     <0 0x2c006000 0 0x2000>;
        };
 
        timer {
diff --git a/arch/arm64/include/asm/hypervisor.h 
b/arch/arm64/include/asm/hypervisor.h
new file mode 100644
index 0000000..b90d9e5
--- /dev/null
+++ b/arch/arm64/include/asm/hypervisor.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_ARM_HYPERVISOR_H
+#define _ASM_ARM_HYPERVISOR_H
+
+#include <asm/xen/hypervisor.h>
+
+#endif
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 57f12c9..fc95a8e 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -224,6 +224,7 @@ extern void __iounmap(volatile void __iomem *addr);
 #define PROT_DEFAULT           (PTE_TYPE_PAGE | PTE_AF | PTE_DIRTY)
 #define PROT_DEVICE_nGnRE      (PROT_DEFAULT | PTE_PXN | PTE_UXN | 
PTE_ATTRINDX(MT_DEVICE_nGnRE))
 #define PROT_NORMAL_NC         (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC))
+#define PROT_NORMAL_HACK       (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))
 
 #define ioremap(addr, size)            __ioremap((addr), (size), 
__pgprot(PROT_DEVICE_nGnRE))
 #define ioremap_nocache(addr, size)    __ioremap((addr), (size), 
__pgprot(PROT_DEVICE_nGnRE))
diff --git a/arch/arm64/include/asm/sync_bitops.h 
b/arch/arm64/include/asm/sync_bitops.h
new file mode 100644
index 0000000..fa323e6
--- /dev/null
+++ b/arch/arm64/include/asm/sync_bitops.h
@@ -0,0 +1,26 @@
+#ifndef __ASM_SYNC_BITOPS_H__
+#define __ASM_SYNC_BITOPS_H__
+
+#include <asm/bitops.h>
+#include <asm/cmpxchg.h>
+
+/* sync_bitops functions are equivalent to the SMP implementation of the
+ * original functions, independently from CONFIG_SMP being defined.
+ *
+ * We need them because _set_bit etc are not SMP safe if !CONFIG_SMP. But
+ * under Xen you might be communicating with a completely external entity
+ * who might be on another CPU (e.g. two uniprocessor guests communicating
+ * via event channels and grant tables). So we need a variant of the bit
+ * ops which are SMP safe even on a UP kernel.
+ */
+
+#define sync_set_bit(nr, p)            _set_bit(nr, p)
+#define sync_clear_bit(nr, p)          _clear_bit(nr, p)
+#define sync_change_bit(nr, p)         _change_bit(nr, p)
+#define sync_test_and_set_bit(nr, p)   _test_and_set_bit(nr, p)
+#define sync_test_and_clear_bit(nr, p) _test_and_clear_bit(nr, p)
+#define sync_test_and_change_bit(nr, p)        _test_and_change_bit(nr, p)
+#define sync_test_bit(nr, addr)                test_bit(nr, addr)
+#define sync_cmpxchg                   cmpxchg
+
+#endif
diff --git a/arch/arm64/include/asm/xen/events.h 
b/arch/arm64/include/asm/xen/events.h
new file mode 100644
index 0000000..4b4834f
--- /dev/null
+++ b/arch/arm64/include/asm/xen/events.h
@@ -0,0 +1,22 @@
+#ifndef _ASM_ARM_XEN_EVENTS_H
+#define _ASM_ARM_XEN_EVENTS_H
+
+#include <asm/ptrace.h>
+
+enum ipi_vector {
+       XEN_PLACEHOLDER_VECTOR,
+
+       /* Xen IPIs go here */
+       XEN_NR_IPIS,
+};
+
+static inline int xen_irqs_disabled(struct pt_regs *regs)
+{
+       return raw_irqs_disabled_flags(regs->pstate);
+}
+
+#define xchg_xen_ulong(ptr, val) atomic64_xchg(container_of((ptr),     \
+                                                           atomic64_t, \
+                                                           counter), (val))
+
+#endif /* _ASM_ARM_XEN_EVENTS_H */
diff --git a/arch/arm64/include/asm/xen/hypercall.h 
b/arch/arm64/include/asm/xen/hypercall.h
new file mode 120000
index 0000000..3c2e6ce
--- /dev/null
+++ b/arch/arm64/include/asm/xen/hypercall.h
@@ -0,0 +1 @@
+../../../../arm/include/asm/xen/hypercall.h
\ No newline at end of file
diff --git a/arch/arm64/include/asm/xen/hypervisor.h 
b/arch/arm64/include/asm/xen/hypervisor.h
new file mode 120000
index 0000000..e7c8923
--- /dev/null
+++ b/arch/arm64/include/asm/xen/hypervisor.h
@@ -0,0 +1 @@
+../../../../arm/include/asm/xen/hypervisor.h
\ No newline at end of file
diff --git a/arch/arm64/include/asm/xen/interface.h 
b/arch/arm64/include/asm/xen/interface.h
new file mode 120000
index 0000000..3d12f53
--- /dev/null
+++ b/arch/arm64/include/asm/xen/interface.h
@@ -0,0 +1 @@
+../../../../arm/include/asm/xen/interface.h
\ No newline at end of file
diff --git a/arch/arm64/include/asm/xen/page.h 
b/arch/arm64/include/asm/xen/page.h
new file mode 120000
index 0000000..671b1d3
--- /dev/null
+++ b/arch/arm64/include/asm/xen/page.h
@@ -0,0 +1 @@
+../../../../arm/include/asm/xen/page.h
\ No newline at end of file
diff --git a/arch/arm64/xen b/arch/arm64/xen
new file mode 120000
index 0000000..2a99060
--- /dev/null
+++ b/arch/arm64/xen
@@ -0,0 +1 @@
+../arm/xen
\ No newline at end of file
diff --git a/drivers/mfd/vexpress-sysreg.c b/drivers/mfd/vexpress-sysreg.c
index 8286f90..2846439 100644
--- a/drivers/mfd/vexpress-sysreg.c
+++ b/drivers/mfd/vexpress-sysreg.c
@@ -260,10 +260,11 @@ static int vexpress_sysreg_config_func_exec(void *func, 
int offset,
                /* Early execution, no timer available, have to spin */
                u32 cfgstat;
 
-               do {
-                       cpu_relax();
-                       cfgstat = readl(vexpress_sysreg_base + SYS_CFGSTAT);
-               } while (!cfgstat);
+               cpu_relax();
+//             do {
+//                     cpu_relax();
+//                     cfgstat = readl(vexpress_sysreg_base + SYS_CFGSTAT);
+//             } while (!cfgstat);
 
                if (!write && (cfgstat & SYS_CFGSTAT_COMPLETE))
                        *data = readl(vexpress_sysreg_base + SYS_CFGDATA);
diff --git a/drivers/xen/events.c b/drivers/xen/events.c
index 651b576..36f0c91 100644
--- a/drivers/xen/events.c
+++ b/drivers/xen/events.c
@@ -355,20 +355,20 @@ static void init_evtchn_cpu_bindings(void)
 
 static inline void clear_evtchn(int port)
 {
-       struct shared_info *s = HYPERVISOR_shared_info;
-       sync_clear_bit(port, BM(&s->evtchn_pending[0]));
+       //struct shared_info *s = HYPERVISOR_shared_info;
+       //sync_clear_bit(port, &s->evtchn_pending[0]);
 }
 
 static inline void set_evtchn(int port)
 {
-       struct shared_info *s = HYPERVISOR_shared_info;
-       sync_set_bit(port, BM(&s->evtchn_pending[0]));
+       //struct shared_info *s = HYPERVISOR_shared_info;
+       //sync_set_bit(port, &s->evtchn_pending[0]);
 }
 
 static inline int test_evtchn(int port)
 {
-       struct shared_info *s = HYPERVISOR_shared_info;
-       return sync_test_bit(port, BM(&s->evtchn_pending[0]));
+       //struct shared_info *s = HYPERVISOR_shared_info;
+       return 0; //sync_test_bit(port, &s->evtchn_pending[0]);
 }
 
 
@@ -391,8 +391,8 @@ EXPORT_SYMBOL_GPL(notify_remote_via_irq);
 
 static void mask_evtchn(int port)
 {
-       struct shared_info *s = HYPERVISOR_shared_info;
-       sync_set_bit(port, BM(&s->evtchn_mask[0]));
+       //struct shared_info *s = HYPERVISOR_shared_info;
+       //sync_set_bit(port, &s->evtchn_mask[0]);
 }
 
 static void unmask_evtchn(int port)
@@ -418,6 +418,7 @@ static void unmask_evtchn(int port)
                struct evtchn_unmask unmask = { .port = port };
                (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
        } else {
+#if 0
                struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
 
                sync_clear_bit(port, BM(&s->evtchn_mask[0]));
@@ -431,6 +432,7 @@ static void unmask_evtchn(int port)
                    !sync_test_and_set_bit(port / BITS_PER_EVTCHN_WORD,
                                           BM(&vcpu_info->evtchn_pending_sel)))
                        vcpu_info->evtchn_upcall_pending = 1;
+#endif
        }
 
        put_cpu();
@@ -1523,16 +1525,16 @@ static int set_affinity_irq(struct irq_data *data, 
const struct cpumask *dest,
 
 int resend_irq_on_evtchn(unsigned int irq)
 {
-       int masked, evtchn = evtchn_from_irq(irq);
-       struct shared_info *s = HYPERVISOR_shared_info;
+//     int masked, evtchn = evtchn_from_irq(irq);
+//     struct shared_info *s = HYPERVISOR_shared_info;
 
-       if (!VALID_EVTCHN(evtchn))
-               return 1;
+//     if (!VALID_EVTCHN(evtchn))
+//             return 1;
 
-       masked = sync_test_and_set_bit(evtchn, BM(s->evtchn_mask));
-       sync_set_bit(evtchn, BM(s->evtchn_pending));
-       if (!masked)
-               unmask_evtchn(evtchn);
+//     masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
+//     sync_set_bit(evtchn, s->evtchn_pending);
+//     if (!masked)
+//             unmask_evtchn(evtchn);
 
        return 1;
 }
@@ -1576,12 +1578,12 @@ static int retrigger_dynirq(struct irq_data *data)
        int ret = 0;
 
        if (VALID_EVTCHN(evtchn)) {
-               int masked;
+//             int masked;
 
-               masked = sync_test_and_set_bit(evtchn, BM(sh->evtchn_mask));
-               sync_set_bit(evtchn, BM(sh->evtchn_pending));
-               if (!masked)
-                       unmask_evtchn(evtchn);
+//             masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
+//             sync_set_bit(evtchn, sh->evtchn_pending);
+//             if (!masked)
+//                     unmask_evtchn(evtchn);
                ret = 1;
        }
 
diff --git a/include/xen/interface/io/protocols.h 
b/include/xen/interface/io/protocols.h
index 0eafaf2..056744b 100644
--- a/include/xen/interface/io/protocols.h
+++ b/include/xen/interface/io/protocols.h
@@ -15,7 +15,7 @@
 # define XEN_IO_PROTO_ABI_NATIVE XEN_IO_PROTO_ABI_IA64
 #elif defined(__powerpc64__)
 # define XEN_IO_PROTO_ABI_NATIVE XEN_IO_PROTO_ABI_POWERPC64
-#elif defined(__arm__)
+#elif defined(__arm__) || defined(__aarch64__)
 # define XEN_IO_PROTO_ABI_NATIVE XEN_IO_PROTO_ABI_ARM
 #else
 # error arch fixup needed here
diff --git a/kernel/printk.c b/kernel/printk.c
index 587404d..f4ad381 100644
--- a/kernel/printk.c
+++ b/kernel/printk.c
@@ -1542,7 +1542,6 @@ asmlinkage int vprintk_emit(int facility, int level,
         * prefix which might be passed-in as a parameter.
         */
        text_len = vscnprintf(text, sizeof(textbuf), fmt, args);
-       xen_raw_console_write(text);
 
        /* mark and strip a trailing newline */
        if (text_len && text[text_len-1] == '\n') {



_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxx
http://lists.xen.org/xen-devel


 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.