[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] nr_irqs_gsi
On 11/07/12 04:31, Joe Jin wrote: > Hi, > > IHAC whose server have 12 NICs, but when bring up found the 12 NIC not be > enabled, I found below from xm-dmesg > (XEN) physdev.c:122: dom0: map invalid irq 55 > > The corresponding codes: > > 115 /* Verify or get irq. */ > 116 switch ( map->type ) > 117 { > 118 case MAP_PIRQ_TYPE_GSI: > 119 if ( map->index < 0 || map->index >= nr_irqs_gsi ) > 120 { > 121 dprintk(XENLOG_G_ERR, "dom%d: map invalid irq %d\n", > 122 d->domain_id, map->index); > 123 ret = -EINVAL; > 124 goto free_domain; > 125 } > 126 > > Log all info to xm-dmesg I got: > (XEN) ACPI: IOAPIC (id[0x00] address[0xfec00000] gsi_base[0]) > (XEN) IOAPIC[0]: apic_id 0, version 32, address 0xfec00000, GSI 0-23 > (XEN) ACPI: IOAPIC (id[0x01] address[0xfec80000] gsi_base[32]) > (XEN) IOAPIC[1]: apic_id 1, version 32, address 0xfec80000, GSI 32-55 > (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) > (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) > (XEN) ACPI: IRQ0 used by override. > (XEN) ACPI: IRQ2 used by override. > (XEN) ACPI: IRQ9 used by override. > (XEN) Enabling APIC mode: Phys. Using 2 I/O APICs > (XEN) ACPI: HPET id: 0x8086a301 base: 0xfed00000 > (XEN) PCI: MCFG configuration 0: base e0000000 segment 0 buses 0 - 255 > (XEN) PCI: MCFG area at e0000000 reserved in E820 > (XEN) ERST table is invalid > (XEN) Using ACPI (MADT) for SMP configuration information > (XEN) IRQ limits: 55 GSI, 3033 MSI/MSI-X > (XEN) Using scheduler: SMP Credit Scheduler (credit) > > nr_irqs_gsi = 55, > So the condition of #119 should be (map->index > nr_irqs_gsi)? > for GSI irq 55 should be available as well? > > Thanks, > Joe No. There are 55 GSIs, indexed 0 thru 54. You would be introducing an off-by-one error by changing the condition. The more interesting question is why you are attempting to map more GSIs than you actually have. ~Andrew > > _______________________________________________ > Xen-devel mailing list > Xen-devel@xxxxxxxxxxxxx > http://lists.xen.org/xen-devel -- Andrew Cooper - Dom0 Kernel Engineer, Citrix XenServer T: +44 (0)1223 225 900, http://www.citrix.com _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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