Re: [Xen-devel] [PATCH] Xen/MCE: adjust for future new vMCE model

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 06.07.12 at 11:12, Christoph Egger <Christoph.Egger@xxxxxxx> wrote:
> On 07/05/12 20:38, Liu, Jinsong wrote:
>> Yes, I indeed concern AMD cpuid vs. Intel MCG_CAP. Do you suggest
>> that we'd better separately provide Intel's and AMD's vMCE interface?
> 
> That is no reason to have seperate vmce_intel.c and vmce_amd.c files.
> 
> From the last patch in function vmce_init_msr():
> 
> +    g_mcg_cap = MCG_TES_P | MCG_SER_P | GUEST_BANK_NUM;
> +
> 
> I think, this should be changed to:
> 
>      g_mcg_cap = GUEST_BANK_NUM;
>      if (cpu_vendor == X86_VENDOR_INTEL)
>          g_mcg_cap |=  MCG_TES_P | MCG_SER_P;

While I agree in general, that may imply further problems when
migrating between different vendor CPUs. On the assumption
that OSes look at all this information at boot time only, it might
be as simple as adjusting behavior to the guest specified
(possibly restored) value (if the two bits have an effect on vMCE
behavior at all).

> Another question:
> 
> What happens when a guest access the MSRs
> 0xc0000408, 0xc0000409 and 0xc000040a ?

This should depend on the bank count in the vCPU's MCG_CAP
(#GP if count <= 2, returning sensible values - all 0s or all 1s,
depending on the register - if count implies existence of these
MSRs).

Jan


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