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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH] nested vmx: fix instruction decode segment limit check
Hi,
At 16:17 +0100 on 24 Apr (1335284232), Jan Beulich wrote:
> - no limit check in 64-bit mode (is not special in any way)
> - limit check is needed in compatibility mode
> - canonical address check should instead be performed in 64-bit mode
> - the last accessed byte must be within limits, not the first byte past
> the accessed range
>
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
>
> --- a/xen/arch/x86/hvm/vmx/vvmx.c
> +++ b/xen/arch/x86/hvm/vmx/vvmx.c
> @@ -319,7 +319,7 @@ static int decode_vmx_inst(struct cpu_us
> {
> struct vcpu *v = current;
> union vmx_inst_info info;
> - struct segment_register seg;
> + struct segment_register seg, cs;
> unsigned long base, index, seg_base, disp, offset;
> int scale, size;
>
> @@ -342,6 +342,11 @@ static int decode_vmx_inst(struct cpu_us
> hvm_get_segment_register(v, sreg_to_index[info.fields.segment],
> &seg);
> seg_base = seg.base;
>
> + if ( hvm_long_mode_enabled(v) )
> + hvm_get_segment_register(v, x86_seg_cs, &cs);
> + else
> + memset(&cs, 0, sizeof(cs));
> +
I found this a bit confusing - maybe you could extract the attr.fields.l
bit into a bool here instead of zeroing the struct and extracting it later?
Cheers,
Tim.
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