[Xen-devel] [PATCH] move pci_find_ext_capability() into common PCI code

["Jan Beulich" <JBeulich@xxxxxxxx>]

There's nothing architecture specific about it. It requires, however,
that x86-32's pci_conf_read32() tolerates register accesses above 255
(for consistency the adjustment is done to all pci_conf_readNN()
functions).

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>

--- a/xen/arch/ia64/xen/pci.c
+++ b/xen/arch/ia64/xen/pci.c
@@ -135,8 +135,3 @@ void pci_conf_write32(
     BUG_ON((seg > 65535) || (bus > 255) || (dev > 31) || (func > 7) || (reg > 
255));
     pci_sal_write(seg, bus, (dev<<3)|func, reg, 4, data);
 }
-
-int pci_find_ext_capability(int seg, int bus, int devfn, int cap)
-{
-    return 0;
-}
--- a/xen/arch/x86/x86_32/pci.c
+++ b/xen/arch/x86/x86_32/pci.c
@@ -15,9 +15,9 @@ uint8_t pci_conf_read8(
     unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func,
     unsigned int reg)
 {
-    if ( seg )
+    if ( seg || (reg > 255) )
         return ~0;
-    BUG_ON((bus > 255) || (dev > 31) || (func > 7) || (reg > 255));
+    BUG_ON((bus > 255) || (dev > 31) || (func > 7));
     return pci_conf_read(PCI_CONF_ADDRESS(bus, dev, func, reg), reg & 3, 1);
 }
 
@@ -25,9 +25,9 @@ uint16_t pci_conf_read16(
     unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func,
     unsigned int reg)
 {
-    if ( seg )
+    if ( seg || (reg > 255) )
         return ~0;
-    BUG_ON((bus > 255) || (dev > 31) || (func > 7) || (reg > 255));
+    BUG_ON((bus > 255) || (dev > 31) || (func > 7));
     return pci_conf_read(PCI_CONF_ADDRESS(bus, dev, func, reg), reg & 2, 2);
 }
 
@@ -35,9 +35,9 @@ uint32_t pci_conf_read32(
     unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func,
     unsigned int reg)
 {
-    if ( seg )
+    if ( seg || (reg > 255) )
         return ~0;
-    BUG_ON((bus > 255) || (dev > 31) || (func > 7) || (reg > 255));
+    BUG_ON((bus > 255) || (dev > 31) || (func > 7));
     return pci_conf_read(PCI_CONF_ADDRESS(bus, dev, func, reg), 0, 4);
 }
 
@@ -70,8 +70,3 @@ void pci_conf_write32(
     BUG_ON((bus > 255) || (dev > 31) || (func > 7) || (reg > 255));
     pci_conf_write(PCI_CONF_ADDRESS(bus, dev, func, reg), 0, 4, data);
 }
-
-int pci_find_ext_capability(int seg, int bus, int devfn, int cap)
-{
-    return 0;
-}
--- a/xen/arch/x86/x86_64/mmconfig-shared.c
+++ b/xen/arch/x86/x86_64/mmconfig-shared.c
@@ -450,43 +450,3 @@ int pci_mmcfg_reserved(uint64_t address,
 
     return -ENODEV;
 }
-
-/**
- * pci_find_ext_capability - Find an extended capability
- * @dev: PCI device to query
- * @cap: capability code
- *
- * Returns the address of the requested extended capability structure
- * within the device's PCI configuration space or 0 if the device does
- * not support it.  Possible values for @cap:
- *
- *  %PCI_EXT_CAP_ID_ERR         Advanced Error Reporting
- *  %PCI_EXT_CAP_ID_VC          Virtual Channel
- *  %PCI_EXT_CAP_ID_DSN         Device Serial Number
- *  %PCI_EXT_CAP_ID_PWR         Power Budgeting
- */
-int pci_find_ext_capability(int seg, int bus, int devfn, int cap)
-{
-    u32 header;
-    int ttl = 480; /* 3840 bytes, minimum 8 bytes per capability */
-    int pos = 0x100;
-
-    header = pci_conf_read32(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), pos);
-
-    /*
-     * If we have no capabilities, this is indicated by cap ID,
-     * cap version and next pointer all being 0.
-     */
-    if ( (header == 0) || (header == -1) )
-        return 0;
-
-    while ( ttl-- > 0 ) {
-        if ( PCI_EXT_CAP_ID(header) == cap )
-            return pos;
-        pos = PCI_EXT_CAP_NEXT(header);
-        if ( pos < 0x100 )
-            break;
-        header = pci_conf_read32(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), 
pos);
-    }
-    return 0;
-}
--- a/xen/drivers/pci/pci.c
+++ b/xen/drivers/pci/pci.c
@@ -62,3 +62,43 @@ int pci_find_next_cap(u16 seg, u8 bus, u
     }
     return 0;
 }
+
+/**
+ * pci_find_ext_capability - Find an extended capability
+ * @dev: PCI device to query
+ * @cap: capability code
+ *
+ * Returns the address of the requested extended capability structure
+ * within the device's PCI configuration space or 0 if the device does
+ * not support it.  Possible values for @cap:
+ *
+ *  %PCI_EXT_CAP_ID_ERR         Advanced Error Reporting
+ *  %PCI_EXT_CAP_ID_VC          Virtual Channel
+ *  %PCI_EXT_CAP_ID_DSN         Device Serial Number
+ *  %PCI_EXT_CAP_ID_PWR         Power Budgeting
+ */
+int pci_find_ext_capability(int seg, int bus, int devfn, int cap)
+{
+    u32 header;
+    int ttl = 480; /* 3840 bytes, minimum 8 bytes per capability */
+    int pos = 0x100;
+
+    header = pci_conf_read32(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), pos);
+
+    /*
+     * If we have no capabilities, this is indicated by cap ID,
+     * cap version and next pointer all being 0.
+     */
+    if ( (header == 0) || (header == -1) )
+        return 0;
+
+    while ( ttl-- > 0 ) {
+        if ( PCI_EXT_CAP_ID(header) == cap )
+            return pos;
+        pos = PCI_EXT_CAP_NEXT(header);
+        if ( pos < 0x100 )
+            break;
+        header = pci_conf_read32(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), 
pos);
+    }
+    return 0;
+}



_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-devel