[Xen-devel] RE: Ping#2: [PATCH] VMX: extend last branch MSR info to cover newer CPU models

["Shan, Haitao" <haitao.shan@xxxxxxxxx>]

Frankly speaking, it is also a puzzle to me how to get an accurate
exhaustive list of {Family, Model} given an architecture. Anyway, my thought
is "if any models are listed in any intel public document, that information
should be accurate". I myself does not know that SDMs also contains such
kind of info. 

Thus, I can ACK your patch now.

Shan Haitao

> -----Original Message-----
> From: Jan Beulich [mailto:JBeulich@xxxxxxxx]
> Sent: Wednesday, November 09, 2011 4:44 PM
> To: Haitao Shan; Shan, Haitao
> Cc: Dugger, Donald D; Nakajima, Jun; xen-devel@xxxxxxxxxxxxxxxxxxx; Keir
> Fraser
> Subject: RE: Ping#2: [PATCH] VMX: extend last branch MSR info to cover
> newer CPU models
> 
> >>> On 09.11.11 at 03:56, "Shan, Haitao" <haitao.shan@xxxxxxxxx> wrote:
> > Hi, Jan,
> >
> > I found one useful document in intel website.
> > http://software.intel.com/en-us/articles/intel-processor-identificatio
> > n-with
> > -cpuid-model-and-family-numbers/
> > From the doc, it seems model 45 is not in the list.
> 
> Neither is model 31.
> 
> Which tells us what? That the page isn't up-to-date? After all model 31 is
> referenced in SDM Vol 3 appendix B.4, and model 45 in the same document
> appendix B.7. They're also both in table B-1 of the SDM doc changes (rev
032
> from May this year). Or are you saying the SDM is incorrect?
> 
> At least this answers the question raised in
> http://lists.xensource.com/archives/html/xen-devel/2011-
> 11/msg00411.html
> - 0x2E and 0x2F are supposed to go into the Nehalem/Westmere group then
> for cpuidle purposes.
> 
> Jan
> 
> > Shan Haitao
> >
> >> -----Original Message-----
> >> From: Jan Beulich [mailto:JBeulich@xxxxxxxx]
> >> Sent: Thursday, November 03, 2011 5:24 PM
> >> To: Haitao Shan; Shan, Haitao
> >> Cc: Dugger, Donald D; Nakajima, Jun; xen-devel@xxxxxxxxxxxxxxxxxxx;
> >> Keir Fraser
> >> Subject: Ping#2: [PATCH] VMX: extend last branch MSR info to cover
> >> newer CPU models
> >>
> >> VMX: extend last branch MSR info to cover newer CPU models #2
> >>
> >> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> >>
> >> --- a/xen/arch/x86/hvm/vmx/vmx.c
> >> +++ b/xen/arch/x86/hvm/vmx/vmx.c
> >> @@ -1738,10 +1738,9 @@ static const struct lbr_info *last_branc
> >>          case 23:
> >>              return c2_lbr;
> >>              break;
> >> -        /* Nehalem */
> >> -        case 26: case 30: case 31: case 46:
> >> -        /* Sandy Bridge */
> >> -        case 42: case 45:
> >> +        /* Nehalem/Sandy Bridge */
> >> +        case 26: case 30: case 31: case 37:
> >> +        case 42: case 44: case 45: case 46: case 47:
> >>              return nh_lbr;
> >>              break;
> >>          /* Atom */
> >>
> >>
> 
>

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