RE: [Xen-devel] Re: [PATCH] CPUIDLE: revise tsc-save/restore to avoid big tsc skew between cpus

["Wei, Gang" <gang.wei@xxxxxxxxx>]

On Saturday, December 13, 2008 5:51 PM, Keir Fraser wrote:
> By the way, c/s 18102 (subsequently reverted) may be interesting for you in
> implementing the TSC-and-no-platform-timer mode. I'm not sure how much of it
> will really be applicable, but it might be worth a look at least.

c/s 18102 looks like a incompleted patch which want to reintroduce TSC as the 
plt only when the tsc is always running & at a constant rate. I guess you still 
want it because TSC access has less cost, right? Anyway, it indeed has less to 
do with my current goal: handling the deepC-stop tsc which runs at constant 
rate.

Jimmy
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