CPU functions can be classified into 3 categories: (1) native functions that
are used on both platforms, (2) native functions used only by HVM (KVM) and (3)
paravirtualized functions currently used by Xen PV VM.
Signed-off-by: Costin Lupu <costin.lupu@xxxxxxxxx>
---
plat/common/include/x86/cpu.h | 109 +++++++++++++++++++++++++++++++++++++++++
plat/common/x86/cpu_native.c | 49 ++++++++++++++++++
plat/kvm/shutdown.c | 2 +-
plat/kvm/x86/console.c | 2 +-
plat/xen/Makefile.uk | 3 ++
plat/xen/include/xen-x86/cpu.h | 103 --------------------------------------
plat/xen/include/xen-x86/os.h | 1 -
plat/xen/x86/arch_events.c | 2 +-
plat/xen/x86/arch_time.c | 4 +-
plat/xen/x86/cpu_pv.c | 47 ++++++++++++++++++
10 files changed, 213 insertions(+), 109 deletions(-)
create mode 100644 plat/common/include/x86/cpu.h
create mode 100644 plat/common/x86/cpu_native.c
delete mode 100644 plat/xen/include/xen-x86/cpu.h
create mode 100644 plat/xen/x86/cpu_pv.c
diff --git a/plat/common/include/x86/cpu.h b/plat/common/include/x86/cpu.h
new file mode 100644
index 0000000..ce96c1c
--- /dev/null
+++ b/plat/common/include/x86/cpu.h
@@ -0,0 +1,109 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+/*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/******************************************************************************
+ * cpu.h
+ *
+ * CPU related macros and definitions copied from mini-os/os.h
+ */
+
+#include <uk/arch/types.h>
+
+
+void halt(void);
+
+static inline void cpuid(__u32 leaf, __u32 *eax, __u32 *ebx,
+ __u32 *ecx, __u32 *edx)
+{
+ asm volatile("cpuid"
+ : "=a"(*eax), "=b"(*ebx), "=c"(*ecx), "=d"(*edx)
+ : "0"(leaf));
+}
+
+unsigned long read_cr2(void);
+
+static inline void write_cr3(unsigned long cr3)
+{
+ asm volatile("mov %0, %%cr3" : : "r"(cr3) : "memory");
+}
+
+static inline void invlpg(unsigned long va)
+{
+ asm volatile("invlpg %0" : : "m"(*(const char *)(va)) : "memory");
+}
+
+
+static inline void wrmsr(unsigned int msr, __u32 lo, __u32 hi)
+{
+ asm volatile("wrmsr"
+ : /* no outputs */
+ : "c"(msr), "a"(lo), "d"(hi));
+}
+
+static inline void wrmsrl(unsigned int msr, __u64 val)
+{
+ wrmsr(msr, (__u32) (val & 0xffffffffULL), (__u32) (val >> 32));
+}
+
+
+static inline __u64 rdtsc(void)
+{
+ __u64 l, h;
+
+ __asm__ __volatile__("rdtsc" : "=a"(l), "=d"(h));
+ return (h << 32) | l;
+}
+
+
+/* accessing devices via port space */
+static inline __u8 inb(__u16 port)
+{
+ __u8 v;
+
+ __asm__ __volatile__("inb %1,%0" : "=a"(v) : "dN"(port));
+ return v;
+}
+
+static inline void outb(__u16 port, __u8 v)
+{
+ __asm__ __volatile__("outb %0,%1" : : "a"(v), "dN"(port));
+}
+
+static inline void outw(__u16 port, __u16 v)
+{
+ __asm__ __volatile__("outw %0,%1" : : "a"(v), "dN"(port));
+}
+
+static inline __u64 mul64_32(__u64 a, __u32 b)
+{
+ __u64 prod;
+
+ __asm__ (
+ "mul %%rdx ; "
+ "shrd $32, %%rdx, %%rax"
+ : "=a" (prod)
+ : "0" (a), "d" ((__u64) b)
+ );
+
+ return prod;
+}
diff --git a/plat/common/x86/cpu_native.c b/plat/common/x86/cpu_native.c
new file mode 100644
index 0000000..0330a20
--- /dev/null
+++ b/plat/common/x86/cpu_native.c
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Authors: Costin Lupu <costin.lupu@xxxxxxxxx>
+ *
+ * Copyright (c) 2018, NEC Europe Ltd., NEC Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
+ */
+
+#include <x86/cpu.h>
+
+void halt(void)
+{
+ __asm__ __volatile__ ("hlt" : : : "memory");
+}
+
+unsigned long read_cr2(void)
+{
+ unsigned long cr2;
+
+ __asm__ __volatile__("mov %%cr2, %0" : "=r"(cr2));
+
+ return cr2;
+}
diff --git a/plat/kvm/shutdown.c b/plat/kvm/shutdown.c
index 6b5baf2..673d065 100644
--- a/plat/kvm/shutdown.c
+++ b/plat/kvm/shutdown.c
@@ -22,7 +22,7 @@
*/
#include <errno.h>
-#include <kvm-x86/cpu_x86_64.h>
+#include <x86/cpu.h>
#include <uk/print.h>
#include <uk/plat/bootstrap.h>
diff --git a/plat/kvm/x86/console.c b/plat/kvm/x86/console.c
index 28e1246..cfcc3cd 100644
--- a/plat/kvm/x86/console.c
+++ b/plat/kvm/x86/console.c
@@ -25,8 +25,8 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
+#include <x86/cpu.h>
#include <kvm/console.h>
-#include <kvm-x86/cpu_x86_64.h>
#include <uk/plat/console.h>
#include <uk/essentials.h>
#include <uk/print.h>
diff --git a/plat/xen/Makefile.uk b/plat/xen/Makefile.uk
index c1b2ecb..220c8d9 100644
--- a/plat/xen/Makefile.uk
+++ b/plat/xen/Makefile.uk
@@ -41,6 +41,9 @@ LIBXENPLAT_SRCS-$(LIBUKSCHED) +=
$(LIBXENPLAT_BASE)/x86/arch_thread.c
ifneq ($(XEN_HVMLITE),y)
LIBXENPLAT_ASFLAGS-y += -DCONFIG_PARAVIRT
LIBXENPLAT_CFLAGS-y += -DCONFIG_PARAVIRT
+LIBXENPLAT_SRCS-y += $(LIBXENPLAT_BASE)/x86/cpu_pv.c
+else
+LIBXENPLAT_SRCS-y += $(UK_PLAT_COMMON_BASE)/x86/cpu_native.c
endif
endif
diff --git a/plat/xen/include/xen-x86/cpu.h b/plat/xen/include/xen-x86/cpu.h
deleted file mode 100644
index cf9241b..0000000
--- a/plat/xen/include/xen-x86/cpu.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/* SPDX-License-Identifier: BSD-2-Clause */
-/*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-/******************************************************************************
- * cpu.h
- *
- * CPU related macros and definitions copied from os.h
- */
-
-#ifndef PLAT_XEN_INCLUDE_XEN_X86_CPU_H_
-#define PLAT_XEN_INCLUDE_XEN_X86_CPU_H_
-
-#ifdef CONFIG_PARAVIRT
-#include <common/hypervisor.h>
-#endif
-
-static inline void write_cr3(unsigned long cr3)
-{
- asm volatile("mov %0, %%cr3" : : "r"(cr3) : "memory");
-}
-
-static inline void invlpg(unsigned long va)
-{
- asm volatile("invlpg %0" : : "m"(*(const char *)(va)) : "memory");
-}
-
-/************************** i386 *******************************/
-#ifdef __X64_32__
-
-#define rdtscll(val) (asm volatile("rdtsc" : "=A"(val)))
-
-/************************** x86_84 *******************************/
-#elif defined __X86_64__
-
-#define rdtscll(val) \
- do { \
- unsigned int __a, __d; \
- asm volatile("rdtsc" : "=a"(__a), "=d"(__d)); \
- (val) = ((unsigned long)__a) | (((unsigned long)__d) << 32); \
- } while (0)
-
-#else /* ifdef __x86_64__ */
-#error "Unsupported architecture"
-#endif
-
-/********************* common i386 and x86_64 ****************************/
-
-#define wrmsr(msr, val1, val2) \
-({ \
- asm volatile("wrmsr" \
- : /* no outputs */ \
- : "c"(msr), "a"(val1), "d"(val2)); \
-})
-
-static inline void wrmsrl(unsigned int msr, uint64_t val)
-{
- wrmsr(msr, (uint32_t)(val & 0xffffffffULL), (uint32_t)(val >> 32));
-}
-
-static inline void cpuid(uint32_t leaf, uint32_t *eax, uint32_t *ebx,
- uint32_t *ecx, uint32_t *edx)
-{
- asm volatile("cpuid"
- : "=a"(*eax), "=b"(*ebx), "=c"(*ecx), "=d"(*edx)
- : "0"(leaf));
-}
-
-#ifdef CONFIG_PARAVIRT
-static inline unsigned long read_cr2(void)
-{
- return HYPERVISOR_shared_info->vcpu_info[smp_processor_id()].arch.cr2;
-}
-#else
-static inline unsigned long read_cr2(void)
-{
- unsigned long cr2;
-
- asm volatile("mov %%cr2,%0\n\t" : "=r"(cr2));
- return cr2;
-}
-#endif
-
-#endif /* PLAT_XEN_INCLUDE_XEN_X86_CPU_H_ */
diff --git a/plat/xen/include/xen-x86/os.h b/plat/xen/include/xen-x86/os.h
index 3df773c..6fa4fa0 100644
--- a/plat/xen/include/xen-x86/os.h
+++ b/plat/xen/include/xen-x86/os.h
@@ -111,7 +111,6 @@ typedef struct {
volatile int counter;
} atomic_t;
-#include <xen-x86/cpu.h>
/********************* common i386 and x86_64 ****************************/
#define xen_mb() mb()
diff --git a/plat/xen/x86/arch_events.c b/plat/xen/x86/arch_events.c
index dca3b9c..5b88065 100644
--- a/plat/xen/x86/arch_events.c
+++ b/plat/xen/x86/arch_events.c
@@ -28,8 +28,8 @@
* Ported from Mini-OS
*/
#include <stdint.h>
+#include <x86/cpu.h>
#include <uk/plat/config.h>
-#include <xen-x86/cpu.h>
#if defined(__x86_64__)
static char irqstack[2 * STACK_SIZE];
diff --git a/plat/xen/x86/arch_time.c b/plat/xen/x86/arch_time.c
index 991c030..9e9f1bf 100644
--- a/plat/xen/x86/arch_time.c
+++ b/plat/xen/x86/arch_time.c
@@ -35,10 +35,10 @@
#include <stdint.h>
#include <sys/time.h>
+#include <x86/cpu.h>
#include <uk/plat/time.h>
#include <common/hypervisor.h>
#include <common/events.h>
-#include <xen-x86/cpu.h>
#include <xen-x86/irq.h>
#include <uk/assert.h>
@@ -134,7 +134,7 @@ static unsigned long get_nsec_offset(void)
{
uint64_t now, delta;
- rdtscll(now);
+ now = rdtsc();
delta = now - shadow.tsc_timestamp;
return scale_delta(delta, shadow.tsc_to_nsec_mul, shadow.tsc_shift);
diff --git a/plat/xen/x86/cpu_pv.c b/plat/xen/x86/cpu_pv.c
new file mode 100644
index 0000000..471cc37
--- /dev/null
+++ b/plat/xen/x86/cpu_pv.c
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Authors: Costin Lupu <costin.lupu@xxxxxxxxx>
+ *
+ * Copyright (c) 2018, NEC Europe Ltd., NEC Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
+ */
+
+#include <x86/cpu.h>
+#include <common/hypervisor.h>
+
+
+void halt(void)
+{
+ HYPERVISOR_sched_op(SCHEDOP_block, 0);
+}
+
+unsigned long read_cr2(void)
+{
+ return HYPERVISOR_shared_info->vcpu_info[smp_processor_id()].arch.cr2;
+}
