Re: [Xen-users] Marvell, IOMMU/VT-d, and pci-phantom

[Ian Campbell <Ian.Campbell@xxxxxxxxxx>]

On Fri, 2013-06-28 at 15:38 +0100, Jan Beulich wrote:
> >>> On 28.06.13 at 16:10, Ian Campbell <Ian.Campbell@xxxxxxxxxx> wrote:
> > On Fri, 2013-06-28 at 14:59 +0100, Jan Beulich wrote:
> >>  So
> >> 
> >> pci-phantom=06:00,1
> >> 
> >> should do, provided this is a single-function device.
> > 
> > So what does stride actually mean? To me it suggests every N-th device,
> > but in that case how do we know how many there are in total?
> 
> Every N-th function. With there being up to 8 functions per device,
> stride one means all of them, stride 2 every even one, and stride 4
> functions 0 and 4.
> 
> On a single function device it is generally safe to use stride 1. On
> multi function devices stride must not result in collisions with one
> of the other functions.
> 
> >> > Jan, since you wrote this patch for Marvell devices I suppose you know
> >> > the right incantation for this bit of hardware?
> >> 
> >> The specific hardware doesn't matter, we're basically just overriding
> >> rwo bits that a device behaving this way should have set in its PCIe
> >> capability structure (i.e. the resulting behavior is generic).
> > 
> > I'm not 100% convinced that requiring users to understand the PCIe
> > capability structures here is "fair", but I suppose it is an advanced
> > feature.
> 
> Oh, that part of the response was more to you than the original
> user.
> 
> > Assuming you meant "two" not "rwo", which two bits are they?
> 
> PCI_EXP_DEVCAP_PHANTOM in terms of xen/include/xen/pci_regs.h.

And those are a shift, giving you the stride={1,2,4}, got it, thanks!

Ian



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