Re: [XenPPC] [PATCH] Disable DPM until code is audited

[Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>]

> > > Do not set the NAP and DPM bits in HID0 until we have had a  
> > > chance to
> > > audit the safe halt and idle loop code.  Not setting these bits  
> > > allows
> > > the model 884241X JS20 blade in TRL to boot correctly, and  
> > > possibly also
> > > the Maple in YKT.  Thanks to Jimi for his help in this matter.
> > Is the DPM change required?  I never saw any problems
> > here...  NAP and other power saving modes can cause
> > problems for sure (for example, on pre-970MP 970s, some
> > power saving modes require flushing the L2 before entering
> > that mode, etc.)
> Most JS20 and JS21 have DPM disabled on the board,
What does this mean?  SLOF/js2x enables DPM always, for
example; there is no hardware override that I'm aware of.

> which is why we have not seen any SMP problems with them.  However  
> the Maple-D and the JS20 model Amos cites both have had problems  
> with the one of these two modes.  That model seems to be the newest  
> JS20 we've run on.
Sounds like the problem manifests itself on all 970FX and
no other CPUs from the 970 family.

> We'll have to brush up on errata before we enable this one again.
Yeah; errata and other chip differences.

My question remains: did you try with NAP disabled and
DPM enabled?


Segher


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