Re: [XenPPC] PATCH: Inline assembler for clear_page() and copy_page()

[Jimi Xenidis <jimix@xxxxxxxxxxxxxx>]

On Aug 25, 2006, at 5:48 PM, poff@xxxxxxxxxxxxxx wrote:
> Following code includes assembler versions of clear_page_cacheable 
> (), by Xenidis,
> copy_page(), and copy_page_cacheable(). The 'cacheable' versions  
> use 'dcbz' for
> clearing cache lines; the target page is assumed to be cacheable.
On PowerPC, the cache is always on in RealMode and we have to do  
backflips (see io.S) to perform cache-inhibited actions.
> This code has been debugged with a small application program on  
> JS21. Also code
> has been incorporated into a xen tree and runs on JS21 (though  
> copy_page() is not
> being used).
>
> note: in some documentation, dcbz is for 32 byte cache lines, dcbzl  
> for 128
Dan, we (like linux) force all our cache line operations to be 128  
bytes via the HID setting in ppc970.c where we set hid5.  I see not  
that that could be better documented, I got lazy since the user  
manual for 970 is now public.
> However, the crossbuild assembler does not recognize dcbzl. The  
> native assembler
> (for building the test application) would accept either dcbz or  
> dcbzl, and in either
> case the 128 byte cache line was cleared.
the instruction is reserved for apple who are the only SW vendor that  
currently support and programming model for 32 byte cache operations.
> note2: in page_alloc.c, one of the three clear_page() calls breaks  
> the system
> when changed to clear_page_cacheable().
Break how? build? run? hang?

-JX


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