[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [XenPPC] small bug in exceptions.S?
I don't have a failure case, but I noticed this while reading code at line 307 in xen/arch/ppc/ppc64/exceptions.S. It seems to me that this code doesn't do what the comment says is intended. /* clear MSR:RI/EE to set SRR0/SRR1 */ mfmsr r0 li r13, 0 mtmsrd r0, 1 I believe correct code would be: li r0,0 mtmsrd r0, 1 Mark Mergen _______________________________________________ Xen-ppc-devel mailing list Xen-ppc-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-ppc-devel
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