[XenPPC] [pushed] [ppc] FPSCR and XER are really 64 bit quantities

[Jimi Xenidis <jimix@xxxxxxxxxxxxxx>]

changeset:   9950:249f22f51bb31148f896be0c7e85618b20f8c5fd
tag:         tip
user:        jimix@xxxxxxxxxxxxxxxxxxxxx
date:        Tue Apr 25 15:04:52 2006 -0400
files:       xen/arch/ppc/float.S xen/arch/ppc/gdbstub.c 
xen/arch/ppc/ppc64/exceptions.S xen/include/public/arch-ppc64.h
description:
[ppc] FPSCR and XER are really 64 bit quantities
  - FPSCR should be save/restored with stfd/lfd since the 32 bit form
    can mangle the value.
  - XER is architecturally a 64bit register.


diff -r 7f3bdb114f0a2407e7ef47046683265561189e3f -r 
249f22f51bb31148f896be0c7e85618b20f8c5fd xen/arch/ppc/float.S
--- a/xen/arch/ppc/float.S      Tue Apr 18 14:53:00 2006 -0400
+++ b/xen/arch/ppc/float.S      Tue Apr 25 15:04:52 2006 -0400
@@ -58,11 +58,11 @@ save_fp:
        stfdu   fr30,FPR_WIDTH(r4)
        stfdu   fr31,FPR_WIDTH(r4)
        mffs    fr0
-       stfs    fr0,VCPU_fpscr(r3)
+       stfd    fr0,VCPU_fpscr(r3)
        blr
 
 load_fp:
-       lfs     fr0,VCPU_fpscr(r3)
+       lfd     fr0,VCPU_fpscr(r3)
        mtfsf   0xff,fr0
 
        addi    r4, r3, VCPU_fprs - FPR_WIDTH
diff -r 7f3bdb114f0a2407e7ef47046683265561189e3f -r 
249f22f51bb31148f896be0c7e85618b20f8c5fd xen/arch/ppc/gdbstub.c
--- a/xen/arch/ppc/gdbstub.c    Tue Apr 18 14:53:00 2006 -0400
+++ b/xen/arch/ppc/gdbstub.c    Tue Apr 25 15:04:52 2006 -0400
@@ -124,7 +124,7 @@ gdb_arch_read_reg_array(struct cpu_user_
     gdb_write_to_packet_hex(state->cr, sizeof (state->cr), ctx);
     gdb_write_to_packet_hex(state->lr, sizeof (state->lr), ctx);
     gdb_write_to_packet_hex(state->ctr, sizeof (state->ctr), ctx);
-    gdb_write_to_packet_hex(state->xer, sizeof (state->xer), ctx);
+    gdb_write_to_packet_hex(state->xer, sizeof (u32), ctx);
     gdb_write_to_packet_hex(0, sizeof(u32), ctx); /* fpscr */
     gdb_send_packet(ctx);
 }
@@ -154,8 +154,8 @@ gdb_arch_write_reg_array(struct cpu_user
     buf += sizeof (regs->lr) * 2;
     regs->ctr = str2ulong(buf, sizeof (regs->ctr));
     buf += sizeof (regs->ctr) * 2;
-    regs->xer = str2ulong(buf, sizeof (regs->xer));
-    buf += sizeof (regs->xer) * 2;
+    regs->xer = str2ulong(buf, sizeof (u32));
+    buf += sizeof (u32) * 2;
 }
 
 unsigned int
@@ -182,7 +182,7 @@ gdb_arch_print_state(struct cpu_user_reg
     /* XXX
        printk("DAR: 0x%016lx DSISR: 0x%016lx\n", state->dar, state->dsisr);
        */
-    printk("CR: 0x%08x XER: 0x%08x\n", state->cr, state->xer);
+    printk("CR: 0x%08x XER: 0x%016x\n", state->cr, state->xer);
     for (; i < 32; i+=4) {
         printk("%02d: 0x%016lx 0x%016lx 0x%016lx 0x%016lx\n",
                 i, state->gprs[i], state->gprs[i+1],
diff -r 7f3bdb114f0a2407e7ef47046683265561189e3f -r 
249f22f51bb31148f896be0c7e85618b20f8c5fd xen/arch/ppc/ppc64/exceptions.S
--- a/xen/arch/ppc/ppc64/exceptions.S   Tue Apr 18 14:53:00 2006 -0400
+++ b/xen/arch/ppc/ppc64/exceptions.S   Tue Apr 25 15:04:52 2006 -0400
@@ -72,13 +72,13 @@ 1:
     mflr r0
     std r0, UREGS_lr(\uregs)        /* save LR */
     mfxer r0
-    stw r0, UREGS_xer(\uregs)       /* save XER */
+    std r0, UREGS_xer(\uregs)       /* save XER */
 .endm
 
 .macro LOAD_C_STATE uregs
     ld r0, UREGS_lr(\uregs)         /* load LR */
     mtlr r0
-    lwz r0, UREGS_xer(\uregs)       /* load XER */
+    ld r0, UREGS_xer(\uregs)       /* load XER */
     mtxer r0
     lwz r0, UREGS_cr(\uregs)        /* load CR */
     mtcr r0
diff -r 7f3bdb114f0a2407e7ef47046683265561189e3f -r 
249f22f51bb31148f896be0c7e85618b20f8c5fd xen/include/public/arch-ppc64.h
--- a/xen/include/public/arch-ppc64.h   Tue Apr 18 14:53:00 2006 -0400
+++ b/xen/include/public/arch-ppc64.h   Tue Apr 25 15:04:52 2006 -0400
@@ -71,9 +71,9 @@ typedef struct cpu_user_regs
     uint64_t srr1;
     uint64_t pc;
     uint64_t msr;
-    uint32_t fpscr;
+    uint64_t fpscr;
+    uint64_t xer;
     uint32_t cr;
-    uint32_t xer;
     uint32_t entry_vector;
 } cpu_user_regs_t;
 



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