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[Xen-ia64-devel] Where are DTR6 and DTRA defined and set?


  • To: "xen-ia64-devel@xxxxxxxxxxxxxxxxxxx" <xen-ia64-devel@xxxxxxxxxxxxxxxxxxx>
  • From: Paul Leisy <pleisy@xxxxxxxxx>
  • Date: Fri, 30 May 2008 14:24:29 -0700
  • Accept-language: en-US
  • Acceptlanguage: en-US
  • Delivery-date: Fri, 30 May 2008 14:24:45 -0700
  • List-id: Discussion of the ia64 port of Xen <xen-ia64-devel.lists.xensource.com>
  • Thread-index: AQHIwpuLDvnSQodNLECbyb0ydlqNVg==
  • Thread-topic: Where are DTR6 and DTRA defined and set?

Greetings,

Using a hardware probe while running an HVM guest, I examined
the Data TLB to see what TRs Xen had setup. It showed that
DTR0,2,4,6,A were valid. Searching the Xen source code, I
found these defined:

DTR0 = IA64_TR_KERNEL
DTR1 = IA64_TR_PERCPU_DATA
DTR2 = IA64_TR_CURRENT_STACK
DTR3 = IA64_TR_MAPPED_REGS
DTR4 = IA64_TR_SHARED_INFO
DTR5 = IA64_TR_VHPT

But these were not found:
DTR6 = ????
DTRA = ????

Can someone tell me where these DTRs are defined and
what code sets them up?

Thanks,
-Paul Leisy

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