[Xen-ia64-devel] Re: [PATCH][RFC] fix DTLB miss behavior with physical mode

[Kouya Shimura <kouya@xxxxxxxxxxxxxx>]

Aha! Thanks for your help.

Actually, this issue is not inconvenient for me.
But I just wanted to fix it correctly. 
Attaching a revised patch. It looks better.

Thanks,
Kouya

tgingold@xxxxxxx writes:
> Quoting Kouya Shimura <kouya@xxxxxxxxxxxxxx>:
> 
> > Hi,
> >
> > A behavior with bad physical address on HVM is unpredictable.
> > It means that a speculative load can't be used with physical mode.
> >
> > This patch fixes it. but it still implies a issue with metaphyscial
> > mode. There is no way to distinguish RSE fault from DTLB miss.
> > Is there any good idea?
> 
> isr.rs ?
> 
> I still fail to see which bug you are trying to fix... (but I don't have the
> full context here).

Signed-off-by: Kouya Shimura <kouya@xxxxxxxxxxxxxx>

diff -r 2d220f1d2254 xen/arch/ia64/vmx/vmx_fault.c
--- a/xen/arch/ia64/vmx/vmx_fault.c     Fri Mar 14 13:05:27 2008 +0900
+++ b/xen/arch/ia64/vmx/vmx_fault.c     Fri Mar 14 20:41:08 2008 +0900
@@ -356,11 +356,15 @@ vmx_hpw_miss(u64 vadr, u64 vec, REGS* re
     else
         panic_domain(regs, "wrong vec:%lx\n", vec);
 
-    /* Physical mode and region is 0 or 4.  */
     mmu_mode = VMX_MMU_MODE(v);
-    if ((mmu_mode == VMX_MMU_PHY_DT
-         || (mmu_mode == VMX_MMU_PHY_D && type == DSIDE_TLB))
-        && (REGION_NUMBER(vadr) & 3) == 0) {
+    switch (mmu_mode) {
+    case VMX_MMU_PHY_D:  // vpsr.it=1 vpsr.dt=0 vpsr.rt=1
+        if (type != DSIDE_TLB)
+            break;
+        if (misr.rs) // RSE fault
+            break;
+        /* fall through */
+    case VMX_MMU_PHY_DT: // vpsr.it=0 vpsr.dt=0 vpsr.rt=0
         if (type == DSIDE_TLB) {
             u64 pte;
             /* DTLB miss.  */

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