RE: [Xen-ia64-devel] [PATCH] unify vtlb and vhpt

[tgingold@xxxxxxx]

Hi Kouya,

to be honest I have mixed feelings about your patch.  I like it but I don't
really understand its purpose.  See my comment.

I still think it would be nice if the vTLB were TR-mapped.


Quoting Kouya Shimura <kouya@xxxxxxxxxxxxxx>:

> Dong, Eddie writes:
> > This can be simply solved by increasing vTLB size, or
> > use same memory with VHPT.
>
> The problem is, how much size is suitable?
> There is a trade off. The larger size consumes a time for ptc.e
> emulation and causes a serious slowdown for a Windows guest.

Ok.

> Currently vTLB size is configurable but ordinary users
> can't understand what vTLB is.
> A purpose of this patch is to make users free from
> setting vTLB size.

By merging vTLB and VHPT the user can't anymore set the size of the vTLB.
This is obvious.  But is your patch different from increasing vTLB size ?
Did I miss a point ?

I am not sure it is a good idea to remove vTLB size.  On a real processor
the TLB structure is fixed and defined.

> To tell the truth, I rewrote the vtlb_thash() function before.
> See.
> http://lists.xensource.com/archives/html/xen-ia64-devel/2007-08/msg00108.html
>
> I think the algorithm is the same as HW.
> I did a reverse engineering on a Montecito processor.
> (I'm afraid Montvale use the different algorithm...)

This seems to be the same algorithm as the one for Madison.  Cf Matthew
Chapman pages.

Tristan.

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