[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-ia64-devel] [patch 11/16] ia64: Add identity mapping of EFI memory to itlb_miss
Cc: Isaku Yamahata <yamahata@xxxxxxxxxxxxx> Cc: Tristan Gingold <tgingold@xxxxxxx> Signed-off-by: Simon Horman <horms@xxxxxxxxxxxx> --- Thu, 06 Dec 2007 16:15:27 +0900 * region register index needs to be bit shifted 61 bits to the left * Use EFI region detection logic similar to other patches Fri, 25 Jan 2008 13:41:22 +0900 * Check rr7 not rr6, as the rr changes don't really take full affect until rr7 is switched - and checking on rr6 doesn't work in alt_dtlb_miss Index: xen-unstable.hg/xen/arch/ia64/xen/ivt.S =================================================================== --- xen-unstable.hg.orig/xen/arch/ia64/xen/ivt.S 2008-01-25 13:40:44.000000000 +0900 +++ xen-unstable.hg/xen/arch/ia64/xen/ivt.S 2008-01-25 13:51:15.000000000 +0900 @@ -121,8 +121,24 @@ ENTRY(itlb_miss) /* If address belongs to VMM, go to alt tlb handler */ cmp.eq p6,p0=0x1e,r17 (p6) br.cond.spnt late_alt_itlb_miss - br.cond.sptk fast_tlb_miss_reflect + // If it is an EFI address then must have XEN_EFI_RID set + // And if that is true, go to alt tlb handler + // ((r17 == 0x18 || r17 == 0x1c) && rr7 == XEN_EFI_RID) + // Note: rr7 == XEN_EFI_RID implies rr6 == XEN_EFI_RID + movl r23=7 << 61 + ;; + cmp.eq p8,p0=0x18,r17 // 0xc... + mov r23=rr[r23] + ;; + cmp.eq.or p8,p0=0x1c,r17 // 0xe... + mov r25=XEN_EFI_RID ;; + cmp.eq.and p8,p0=r25,r23 // rr7 == XEN_EFI_RID + ;; +(p8) br.cond.spnt late_alt_itlb_miss + ;; + + br.cond.spnt fast_tlb_miss_reflect END(itlb_miss) .org ia64_ivt+0x0800 -- -- Horms _______________________________________________ Xen-ia64-devel mailing list Xen-ia64-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-ia64-devel
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