[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] RE: [Xen-ia64-devel] [PATCH] xen might misunderstand a normal page asI/O page
Hi Anthony, The guest OS can use ig field{63:53} in VHPT Short/Long Format. Actually Windows seems to use this field and sometimes set bit{60}. Xen/IPF also uses bit{60} of PTE as VTLB_PTE_IO_BIT. So misunderstanding may happen. When first TLB-miss happens, the pteval in a guest VHPT propagates as follows: In vmx_hpw_miss(), => }else if(type == DSIDE_TLB){ => if (!guest_vhpt_lookup(vhpt_adr, &pteval)) { => thash_purge_and_insert(v, pteval, itir, vadr, DSIDE_TLB); In thash_purge_and_insert(), => if(VMX_DOMAIN(v)){ => if (ps == mrr.ps) { => if(!(pte&VTLB_PTE_IO)){ <<<<< This condition is failure else{ vtlb_insert(v, pte, itir, ifa); vcpu_quick_region_set(PSCBX(v,tc_regions),ifa); } After all, this TLB-miss wastes a vtlb and reproduce TLB-miss again. When the second TLB-miss happens, In vmx_hpw_miss(), => if((data=vtlb_lookup(v, vadr,type))!=0){ => if (v->domain != dom0 && type == DSIDE_TLB) { => if (__gpfn_is_io(v->domain, gppa >> PAGE_SHIFT)) { <<<<< failure. resolve misunderstanding => thash_vhpt_insert(v, data->page_flags, data->itir, vadr, type); My patch just masks the ig field. Thanks Kouya Xu, Anthony writes: > Hi Kouya, > > Can you explain more? > > How does misunderstanding happen? > And how does this patch fix it? > > Thanks > Anthony > > Kouya SHIMURA write on 2007年1月24日 12:31: > > Hi, > > > > Hypervisor might misunderstand a normal page as I/O page > > if a guest OS uses the ig field in the guest VHPT. > > > > It seems to be harmless but slightly slow down. > > > > Thanks, > > Kouya > > > > Signed-off-by: Kouya Shimura <kouya@xxxxxxxxxxxxxx> _______________________________________________ Xen-ia64-devel mailing list Xen-ia64-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-ia64-devel
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