RE: [Xen-ia64-devel][PATCH] Enable SMP on VTI domain.

["Xu, Anthony" <anthony.xu@xxxxxxxxx>]

>From: Isaku Yamahata [mailto:yamahata@xxxxxxxxxxxxx]
>Sent: 2006?6?21? 17:25
>To: Xu, Anthony
>Cc: xen-ia64-devel@xxxxxxxxxxxxxxxxxxx
>Subject: Re: [Xen-ia64-devel][PATCH] Enable SMP on VTI domain.
>
>
>On Thu, Jun 01, 2006 at 12:55:08PM +0800, Xu, Anthony wrote:
>
>> >> Or you mean the protection of global purge.
>> >> When a vcpu get IPI to purge TLB,
>> >> What it does is to invalid the TLB entry in VHPT,
>> >> but not remove the TLB entry.
>> >> There is no race condition.
>> >
>> >Is there any gurantee that the vcpu which recives IPI isn't touching VHPT?
>>
>> The vcpu which receives IPI can touch VHPT in the same time.
>> Because purge operation only sets the TLB entry invalid, like entry->ti=1.
>> That has the same philosophy with Tristan's direct purge
>
>Could you review the two attached patches?
>Purge function traverses the collision chain when IPI is sent.
>But there is a window when the assumption of the collision chain
>is broken.
>vmx_hpw_miss() has a race. ia64_do_page_fault() had a similar race before.
>
>--

Sorry for late response.

The second patch is good cleanup and improvement.

I don't understand the race condition the first patch fixes.

Could you please elaborate this?


Thanks,
Anthony


>yamahata

_______________________________________________
Xen-ia64-devel mailing list
Xen-ia64-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-ia64-devel