[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-ia64-devel] [RFC] SMP issues
On Wed, Jun 14, 2006 at 10:33:10AM +0200, Tristan Gingold wrote: > Le Mercredi 14 Juin 2006 10:30, Tristan Gingold a écrit : > > Le Mercredi 14 Juin 2006 07:58, Isaku Yamahata a écrit : > > > - races between global tlb purge and tlb insert > > > This is a race between reading/writing vcpu->arch.{d, i}tlb or VHPT > > > entry. When a vcpu is about to insert tlb, another vcpu may purge tlb > > > cache globally. Inserting tlb (vcpu_itc_no_srlz()) or global tlb purge > > > (domain_flush_vtlb_range() and domain_flush_vtlb_all()) can't update > > > cpu->arch.{d, i}tlb, VHPT and mTLB. So there is a race here. > > > Use sequence lock to avoid this race. > > > After inserting tlb entry, check the sequence lock and retry to insert. > > > This means that when global tlb purge and tlb insert are issued > > > simultaneously, always tlb insert happens after global tlb purge. > > > > > > There was an attempt to resolve this race by checking only > > > vcpu->arch.{d, i}tlb.p bit. However it was incomplete because it > > > doesn't take care of VHPT. > > > > I don't agree with the last paragraph. Sorry for that the paragraph was misleading. I think checking p bit works for ia64_do_page_fault(). I'd like to say that - vcpu_itc_i(), vcpu_itc_d() should be modified. - vcpu_itc_no_srlz() sets p bit when it is called by vcpu_itc_i(), vcpu_itc_d(). So checking p bit doesn't work for vcpu_itc_i(), vcpu_itc_d() Sequence lock is needed to fix vcpu_itc_i() and vcpu_itc_d(). -- yamahata _______________________________________________ Xen-ia64-devel mailing list Xen-ia64-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-ia64-devel
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