[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-ia64-devel] [PATCH] set itv handoff as masked and enable reading irr[0-3]
I had to pull arch/ia64/kernel/sal.c into our build tree with the sparse update to 2.6.16-rc3 because the check_sal_cache_flush() test broke when running on Xen. This patch enables the missing Xen functionality and removes sal.c. Two changes are necessary to do this. First, the conventional handoff state of CR.itv appears to be that the timer vector is masked. It makes sense that we wouldn't want spurious timer interrupts during bootup, but I can't find reference to the CR.itv handoff state in the SAL spec. Second, we need to enable the vcpu_get_irr[0-3] functions. We seem to have all the infrastructure in place to support these, but they're still #ifdef'd out. Maybe someone can comment on whether this is historical or functional. They certainly seem to work correctly for the purposes of the sal cache flush test. Comments welcome. Thanks, Alex Signed-off-by: Alex Williamson <alex.williamson@xxxxxx> --- Attachment:
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