[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-ia64-devel] [PATCH]: vcpu_match_tr_entry & vcpu_ptc_ga
Le Vendredi 31 Mars 2006 04:40, Isaku Yamahata a écrit : > On Thu, Mar 30, 2006 at 04:13:31PM +0100, Tristan Gingold wrote: > > after re-reading code, I think the only possible race is here: > > > > if (/* is_data && */ vcpu_match_tr_entry(trp,address,rid)) { > > if (vcpu->domain==dom0 && !in_tpa) *pteval = > > trp->page_flags; > > > > Do you agree ? > > I think so. > > > Maybe which should force the p bit on pteval ? > > I guess such a trick doesn't solve the problem. > The essential problem is that xen's software tlb cache(vcpu->arch.dtlb) > and physical cpu tlb cache aren't updated atomically. > > > CPU0 CPU1 > > a domain issues ptc.ga a domain issues a access > > ia64_do_page_fault() > vcpu_translate() > vcpu->arch.dtlb cache hit. > > vcpu_ptc_ga() > ia64_global_tlb_purge() > vcpu->rach.dtlb is purged somehow > > vcpu_translate() returns > IA64_NO_FAULT > > translate_domain_pte() > vcpu_itc_no_srlz() > tlb insert > re-cache vcpu->arch.dtlb > vhpt update > > tlb cache entry which should > be purged remains. > > > domain's access succeeds without > domain seeing fault. > > > synchronization > > > a domain again issues access and > succeeds without seeing faults. > However this access should result > in fault. Correct. Thank you for pointing this issue. Tristan. _______________________________________________ Xen-ia64-devel mailing list Xen-ia64-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-ia64-devel
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