[Xen-ia64-devel] IA64_ISR_CODE_MASK

[Tristan Gingold <Tristan.Gingold@xxxxxxxx>]

Hi,

With grep I can get:

./include/asm-ia64/linux-xen/asm/kregs.h:#define IA64_ISR_CODE_MASK     0xf
./include/asm-ia64/vmx_mm_def.h:#define IA64_ISR_CODE_MASK0     0xf
./include/asm-ia64/xenprocessor.h:#define IA64_ISR_CODE_MASK0     0xf

(this has to be cleaned).
But according to my IA64 spec, the code field is 16 bits wide.
So the macro value should be 0xffff
Is it a bug ?

Some uses are:
./arch/ia64/vmx/vmx_ivt.S:      and r22=IA64_ISR_CODE_MASK,r20          // get 
the isr.code field
./arch/ia64/xen/ivt.S:  and r18=IA64_ISR_CODE_MASK,r17          // get the 
isr.code field
./arch/ia64/xen/ivt.S:  and r22=IA64_ISR_CODE_MASK,r20          // get the 
isr.code field
./arch/ia64/xen/process.c:          || ((isr & IA64_ISR_NA) && (isr & 
IA64_ISR_CODE_MASK) == IA64_ISR_CODE_LFETCH))
./arch/ia64/xen/process.c:      if ((isr & IA64_ISR_NA) && ((isr & 
IA64_ISR_CODE_MASK) == IA64_ISR_CODE_LFETCH)) {

Thank you for comments,
Tristan.



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