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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] RE: [Xen-ia64-devel] Event channel vs current scheme speed [wasvIOSAPIC and IRQs delivery]
Tristan Gingold wrote:
> Sorry, I was not clear enough. I agree event channel can mostly
> respect priority.
That is OK, everybody may forget something or ignore something.
>
> Except clock and IPI, I think Linux doesn't use priority. I can't
> force a card to have an higher priority than another card.
> Is it right ?
No. Linux well handle this.
In Itanium architecture, IRQ priority is generated in LSPAIC by vector
number, see SDM2 Table 5-8. In summary, software can program
each RTE on IOSAPIC with certain vector #. High vector # usually
means high priority (plus class inf). Then in linux software,
ia64_handle_irq() do like following:
while (IRQ exist) {
vector=CR.IVR;
mask TPR for lower than vector;
do_IRQ();
Issue CR.EOI
}
Here read IVR get highest priority IRQ and mask lower IRQ using TPR.
Within do_IRQ(), if a IRQ higher than previous one happens, processor is
interrupted again and reenter ia64_handle_irq(). So everything turns
fine :-)
Actually clock and IPI is also handled in this mechanism, they are
equal
with other IRQs except the vector #. So you can assign a card with
higher
IRQ # such as for ethernet card, or assign lower one for something like
mouse.
Current Xen do things similar.
Eddie
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