[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] RE: [Xen-ia64-devel] RE: [PATCH] Patch to make latest hg multi-domainback to work
>From: Magenheimer, Dan (HP Labs Fort Collins) [mailto:dan.magenheimer@xxxxxx] > >> Could you elaborate more how your latest patch works >> differently and fix the potential issue? >> >> - *pteval = vcpu->arch.dtlb_pte; >> + if (vcpu->domain==dom0 && !in_tpa) *pteval = >> trp->page_flags; >> + else *pteval = vcpu->arch.dtlb_pte; >> + printf("DTLB MATCH... NEW, DOM%s, %s\n", >> vcpu->domain==dom0? >> + "0":"U", >> in_tpa?"vcpu_tpa":"ia64_do_page_fault"); >> >> The new limitation seems only for dom0, while dom0 has >> exactly same guest physical address as machine address. Based >> upon this assumption, trp->page_flags actually equals to >> guest pte (vcpu->arch.dtlb_pte)? So I'm not sure about the >> trick here behind. > >Using more printfs, it appears that the problem is that >one of the "page flags" has PL2 and the other has PL0. > >Dan Since vcpu_itc_no_srlz is always invoked after translate_domain_pte which will force _PAGE_PL_2 on, it seems unlikely to insert a machine TC entry with incorrect privilege level. After some search for reference to dtlb/dtlb_pte, I found hyper_ptc_ga though not the full reason, but possible a problematic point? In that section of code, only vcpu->arch.dtlb/itlb is marked as non-present by: adds r25=IA64_VCPU_DTLB_OFFSET,r27 adds r26=IA64_VCPU_ITLB_OFFSET,r27;; ... st8 [r25]=r24 // set 1-entry i/dtlb as not present Instead vcpu->arch.dtlb_pte is not touched. So after my patch changed match_dtlb to return guest pte, above problematic code may leave them out of sync there. Comments? Thanks, Kevin _______________________________________________ Xen-ia64-devel mailing list Xen-ia64-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-ia64-devel
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