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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH v4 06/42] xen/riscv: introduce CPU_NONE
Introduce CPU_NONE, a CPU number which doesn't identify any physical
CPU, to be used wherever a pCPU has to be recorded but there may be
none.
NR_CPUS has been used for that so far: hartid_to_cpuid() returns it for
a hart Xen doesn't know, pcpu_info[] uses it for an entry whose
processor_id isn't valid yet, and vsfile_cpu in struct vimsic_state,
which records the pCPU whose h/w guest interrupt file backs the vCPU's
IMSIC VS-file, uses it to mean that no h/w guest interrupt file is
attached. NR_CPUS is however the number of possible CPUs, i.e. an upper
bound, and a comparison against it reads like a range check rather than
like a test for "no pCPU". Use CPU_NONE in all these places instead,
which states that meaning explicitly.
Checks telling valid CPU numbers from invalid ones by comparing them
against NR_CPUS or nr_cpu_ids keep working, as CPU_NONE is made sure at
build time not to be below NR_CPUS.
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>
---
CPU_NONE is also used later in this series:
- "xen/riscv: implement virtual APLIC MMIO emulation" checks vsfile_cpu
against it to tell whether the target vCPU has a h/w guest interrupt
file.
- "xen/riscv: implement vCPU context switching" initialises the new
arch_vcpu.last_cpu with it.
- "xen/riscv: introduce IMSIC h/w interrupt file attaching to vcpu",
"xen/riscv: remap interrupts to new IMSIC VS-file" and
"xen/riscv: save and clear the old IMSIC VS-file on vCPU migration"
check vsfile_cpu against it to tell a vCPU without a h/w guest
interrupt file.
- "xen/riscv: introduce imsic_migrate_vcpu()" checks vsfile_cpu against
it to tell whether the vCPU has a h/w guest interrupt file to move.
---
Changes in v4:
- Switch hartid_to_cpuid() and pcpu_info[] over to CPU_NONE as well,
and update the commit message accordingly.
- Add BUILD_BUG_ON(CPU_NONE < NR_CPUS) to smp_processor_id().
---
Changes in v3:
- New patch.
---
---
xen/arch/riscv/imsic.c | 6 +++---
xen/arch/riscv/include/asm/config.h | 3 +++
xen/arch/riscv/include/asm/current.h | 2 ++
xen/arch/riscv/include/asm/imsic.h | 2 +-
xen/arch/riscv/include/asm/smp.h | 2 +-
xen/arch/riscv/smp.c | 4 ++--
6 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c
index 44b8640ea39a..8f29c5d2eec1 100644
--- a/xen/arch/riscv/imsic.c
+++ b/xen/arch/riscv/imsic.c
@@ -357,9 +357,9 @@ int cf_check vcpu_imsic_init(struct vcpu *v)
/*
* xvzalloc() already cleared the context, so guest_file_id == 0, i.e. the
* always-available s/w IMSIC VS-file. Only vsfile_cpu needs an explicit
- * initializer as its s/w VS-file value is NR_CPUS rather than 0.
+ * initializer as its s/w VS-file value is CPU_NONE rather than 0.
*/
- imsic_state->vsfile_cpu = NR_CPUS;
+ imsic_state->vsfile_cpu = CPU_NONE;
v->arch.vimsic_state = imsic_state;
@@ -465,7 +465,7 @@ int __init imsic_init(const struct dt_device_node *node)
}
/*
- * hartid_to_cpuid() returns NR_CPUS for a hart Xen doesn't know, so
+ * hartid_to_cpuid() returns CPU_NONE for a hart Xen doesn't know, so
* the range has to be checked before msi[] is indexed at all.
*/
cpu = hartid_to_cpuid(hartid);
diff --git a/xen/arch/riscv/include/asm/config.h
b/xen/arch/riscv/include/asm/config.h
index 8d43ee76da5f..c61406e9dcf8 100644
--- a/xen/arch/riscv/include/asm/config.h
+++ b/xen/arch/riscv/include/asm/config.h
@@ -136,6 +136,9 @@
#define OPT_CONSOLE_STR "dtuart"
#define INVALID_VCPU_ID MAX_VIRT_CPUS
+/* A CPU number which doesn't identify any physical CPU. */
+#define CPU_NONE (~0U)
+
/* Linkage for RISCV */
#ifdef __ASSEMBLER__
#define CODE_FILL /* empty */
diff --git a/xen/arch/riscv/include/asm/current.h
b/xen/arch/riscv/include/asm/current.h
index 06683d7ae060..1f1010e5864f 100644
--- a/xen/arch/riscv/include/asm/current.h
+++ b/xen/arch/riscv/include/asm/current.h
@@ -35,6 +35,8 @@ static inline unsigned int smp_processor_id(void)
{
unsigned int id = tp->processor_id;
+ /* An entry whose processor_id isn't valid yet holds CPU_NONE. */
+ BUILD_BUG_ON(CPU_NONE < NR_CPUS);
BUG_ON(id >= NR_CPUS);
return id;
diff --git a/xen/arch/riscv/include/asm/imsic.h
b/xen/arch/riscv/include/asm/imsic.h
index 639ee327dc67..11e1e3950f42 100644
--- a/xen/arch/riscv/include/asm/imsic.h
+++ b/xen/arch/riscv/include/asm/imsic.h
@@ -71,7 +71,7 @@ struct vimsic_state {
*/
unsigned int guest_file_id;
/*
- * s/w IMSIC VS-file -> vsfile_cpu == NR_CPUS
+ * s/w IMSIC VS-file -> vsfile_cpu == CPU_NONE
* h/w IMSIC VS-file -> vsfile_cpu < NR_CPUS
*/
unsigned int vsfile_cpu;
diff --git a/xen/arch/riscv/include/asm/smp.h b/xen/arch/riscv/include/asm/smp.h
index 625e30b91bb2..3d3d1fa7fbaf 100644
--- a/xen/arch/riscv/include/asm/smp.h
+++ b/xen/arch/riscv/include/asm/smp.h
@@ -28,7 +28,7 @@ static inline unsigned int hartid_to_cpuid(unsigned long
hartid)
}
/* hartid isn't valid for some reason */
- return NR_CPUS;
+ return CPU_NONE;
}
static inline void set_cpuid_to_hartid(unsigned long cpuid,
diff --git a/xen/arch/riscv/smp.c b/xen/arch/riscv/smp.c
index d645364ea47d..21f4dc006252 100644
--- a/xen/arch/riscv/smp.c
+++ b/xen/arch/riscv/smp.c
@@ -9,10 +9,10 @@
* tp points to one of these per cpu.
*
* hart_id would be valid (no matter which value) if its
- * processor_id field is valid (less than NR_CPUS).
+ * processor_id field is valid (not CPU_NONE).
*/
struct pcpu_info pcpu_info[NR_CPUS] = { [0 ... NR_CPUS - 1] = {
- .processor_id = NR_CPUS,
+ .processor_id = CPU_NONE,
}};
void smp_send_event_check_mask(const cpumask_t *mask)
--
2.56.1
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