[PATCH v4 04/42] xen/riscv: define the IPRIO field of the APLIC target register

[Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>]

aplic_init_hw_interrupts() initialises the IPRIO field of the target
registers with APLIC_DEFAULT_PRIORITY, a constant private to aplic.c,
whereas, since commit 60004aa6da75 ("xen/riscv: add missing APLIC
register offsets, masks to asm/aplic.h"), the fields of each APLIC
register and the values they take are defined in <asm/aplic.h>, right
below the register's offset, as described at the top of that header.

Define APLIC_TARGET_IPRIO and APLIC_TARGET_IPRIO_DEFAULT there
accordingly and use the latter instead of APLIC_DEFAULT_PRIORITY. As
the layout of the target register depends on the delivery mode, and
IPRIO overlaps with EIID, also note which fields exist in which mode.

No functional change.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>
---
Changes in v4:
 - New patch, split out of "xen/riscv: implement virtual APLIC MMIO
   emulation".
---
---
 xen/arch/riscv/aplic.c             | 6 ++----
 xen/arch/riscv/include/asm/aplic.h | 4 ++++
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c
index 79bbc0e864d5..bffa29bb21ac 100644
--- a/xen/arch/riscv/aplic.c
+++ b/xen/arch/riscv/aplic.c
@@ -28,8 +28,6 @@
 #include <asm/io.h>
 #include <asm/riscv_encoding.h>
 
-#define APLIC_DEFAULT_PRIORITY  1
-
 static struct aplic_priv aplic = {
     .lock = SPIN_LOCK_UNLOCKED,
 };
@@ -58,9 +56,9 @@ static void __init aplic_init_hw_interrupts(void)
         /*
          * Low bits of target register contains Interrupt Priority bits which
          * can't be zero according to AIA spec.
-         * Thereby they are initialized to APLIC_DEFAULT_PRIORITY.
+         * Thereby they are initialized to APLIC_TARGET_IPRIO_DEFAULT.
          */
-        writel(APLIC_DEFAULT_PRIORITY, &aplic.regs->target[i]);
+        writel(APLIC_TARGET_IPRIO_DEFAULT, &aplic.regs->target[i]);
     }
 
     writel(APLIC_DOMAINCFG_IE | APLIC_DOMAINCFG_DM, &aplic.regs->domaincfg);
diff --git a/xen/arch/riscv/include/asm/aplic.h 
b/xen/arch/riscv/include/asm/aplic.h
index 51be469b69e5..6afdb9cae7a2 100644
--- a/xen/arch/riscv/include/asm/aplic.h
+++ b/xen/arch/riscv/include/asm/aplic.h
@@ -86,9 +86,13 @@
 #define APLIC_TARGET_LAST               0x3ffc
 #define  APLIC_TARGET_HART_IDX          GENMASK(31, 18)
 #define  APLIC_TARGET_HART_IDX_SHIFT    18
+/* If target is in MSI delivery mode (domaincfg.DM = 1) */
 #define  APLIC_TARGET_GUEST_IDX         GENMASK(17, 12)
 /* Bit 11 is reserved and reads as zero */
 #define  APLIC_TARGET_EIID              GENMASK(10, 0)
+/* If target is in direct delivery mode (domaincfg.DM = 0) */
+#define  APLIC_TARGET_IPRIO             GENMASK(7, 0)
+#define   APLIC_TARGET_IPRIO_DEFAULT    1U
 
 #define APLIC_IDC_SIZE                  32
 
-- 
2.56.1