[PATCH 06/30] VMX: support APX

[Jan Beulich <jbeulich@xxxxxxxx>]

While the CR-access exit qualification is extended in place (with the
new bit previously having been reserved/zero), a new Extended
Instruction Information VMCS field is being introduced.

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
---
hvm_monitor_descriptor_access() would need passing the extended
instruction info, too, but that then further requires an interface
change to also get that additional piece of data out to the monitor.

While for the descriptor exit insn info the existing fields don't allow
easy extension, the USER_MSR one in principle would. Version 003 of the
specification, having gained URDMSR/UWRMSR as insns, says nothing either
way, so the extended structure is used as necessary for the time being.
Sadly whether it's reg1 or reg2 that ought to be used also doesn't
really become clear. For now I'm assuming that reg1 represents
ModR/M.rm while reg2 represents ModR/M.reg, deduced from instr-info
definitions for descriptor access insns plus that for VMREAD/VMWRITE.

--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -4204,7 +4204,18 @@ static int vmx_handle_apic_write(void)
 
 static unsigned int msr_imm_gpr(void)
 {
-    msr_imm_instr_info_t info = { .raw = vmread(VMX_INSTRUCTION_INFO) };
+    msr_imm_instr_info_t info;
+
+    if ( cpu_has_apx_f )
+    {
+        extended_instr_info_t xinfo =
+            { .raw = vmread(EXTENDED_INSTRUCTION_INFO) };
+
+        ASSERT(xinfo.mem_reg);
+        return xinfo.reg1;
+    }
+
+    info.raw = vmread(VMX_INSTRUCTION_INFO);
 
     return info.gpr;
 }
--- a/xen/arch/x86/hvm/vmx/vvmx.c
+++ b/xen/arch/x86/hvm/vmx/vvmx.c
@@ -418,17 +418,34 @@ static int decode_vmx_inst(struct cpu_us
                            unsigned long *poperandS, unsigned int size)
 {
     struct vcpu *v = current;
-    union vmx_inst_info info;
+    union extended_instr_info info;
     struct segment_register seg;
     unsigned long base, index, seg_base, disp, offset;
     unsigned int scale;
 
-    __vmread(VMX_INSTRUCTION_INFO, &offset);
-    info.word = offset;
+    if ( cpu_has_apx_f )
+        info.raw = vmread(EXTENDED_INSTRUCTION_INFO);
+    else
+    {
+        union vmx_inst_info iinfo = { .word = vmread(VMX_INSTRUCTION_INFO) };
 
-    if ( info.fields.memreg ) {
+        info.raw               = 0;
+        info.scaling           = iinfo.fields.scaling;
+        info.addr_size         = iinfo.fields.addr_size;
+        info.mem_reg           = iinfo.fields.memreg;
+        info.segment_reg       = iinfo.fields.segment;
+        info.index_reg_invalid = iinfo.fields.index_reg_invalid;
+        info.base_reg_invalid  = iinfo.fields.base_reg_invalid;
+        info.reg1              = iinfo.fields.reg1;
+        info.index_reg         = iinfo.fields.index_reg;
+        info.base_reg          = iinfo.fields.base_reg;
+        info.reg2              = iinfo.fields.reg2;
+    }
+
+    if ( info.mem_reg )
+    {
         decode->type = VMX_INST_MEMREG_TYPE_REG;
-        decode->reg1 = info.fields.reg1;
+        decode->reg1 = info.reg1;
         if ( poperandS != NULL )
             *poperandS = reg_read(regs, egpr, decode->reg1);
     }
@@ -438,18 +455,17 @@ static int decode_vmx_inst(struct cpu_us
 
         decode->type = VMX_INST_MEMREG_TYPE_MEMORY;
 
-        if ( info.fields.segment > x86_seg_gs )
+        if ( info.segment_reg > x86_seg_gs )
             goto gp_fault;
-        hvm_get_segment_register(v, info.fields.segment, &seg);
+        hvm_get_segment_register(v, info.segment_reg, &seg);
         seg_base = seg.base;
 
-        base = info.fields.base_reg_invalid ? 0 :
-            reg_read(regs, egpr, info.fields.base_reg);
+        base = info.base_reg_invalid ? 0 : reg_read(regs, egpr, info.base_reg);
 
-        index = info.fields.index_reg_invalid ? 0 :
-            reg_read(regs, egpr, info.fields.index_reg);
+        index = info.index_reg_invalid ? 0 :
+            reg_read(regs, egpr, info.index_reg);
 
-        scale = 1 << info.fields.scaling;
+        scale = 1 << info.scaling;
 
         __vmread(EXIT_QUALIFICATION, &disp);
 
@@ -457,14 +473,14 @@ static int decode_vmx_inst(struct cpu_us
             size = 4 << mode_64bit;
 
         offset = base + index * scale + disp;
-        switch ( info.fields.addr_size )
+        switch ( info.addr_size )
         {
         case 0: offset = (uint16_t)offset; break;
         case 1: offset = (uint32_t)offset; break;
         default:                           break;
         }
 
-        base = !mode_64bit || info.fields.segment >= x86_seg_fs ?
+        base = !mode_64bit || info.segment_reg >= x86_seg_fs ?
                seg_base + offset : offset;
         if ( offset + size - 1 < offset ||
              (mode_64bit ?
@@ -490,7 +506,7 @@ static int decode_vmx_inst(struct cpu_us
         decode->len = size;
     }
 
-    decode->reg2 = info.fields.reg2;
+    decode->reg2 = info.reg2;
 
     return X86EMUL_OKAY;
 
--- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
@@ -505,6 +505,7 @@ enum vmcs_field {
     SPEC_CTRL_MASK                  = 0x0000204a,
     SPEC_CTRL_SHADOW                = 0x0000204c,
     GUEST_PHYSICAL_ADDRESS          = 0x00002400,
+    EXTENDED_INSTRUCTION_INFO       = 0x00002406,
     VMCS_LINK_POINTER               = 0x00002800,
     GUEST_IA32_DEBUGCTL             = 0x00002802,
     GUEST_PAT                       = 0x00002804,
--- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
@@ -245,8 +245,8 @@ typedef union cr_access_qual {
                  access_type:2,  /* VMX_CR_ACCESS_TYPE_* */
                  lmsw_op_type:1, /* 0 => reg, 1 => mem   */
                  :1,
-                 gpr:4,
-                 :4;
+                 gpr:5,
+                 :3;
         uint16_t lmsw_data;
         uint32_t :32;
     };
@@ -598,4 +598,27 @@ typedef union msr_imm_instr_info {
     };
 } msr_imm_instr_info_t;
 
+/* VM-Exit extended instruction info for APX */
+typedef union extended_instr_info {
+    unsigned long raw;
+    struct {
+        unsigned int scaling          :2,  /* bits 0:1 - Scaling */
+                     addr_size        :2;  /* bits 2:3 - Address size */
+        bool         mem_reg          :1;  /* bit 4 - Mem/Reg */
+        unsigned int operand_size     :2,  /* bits 5:6 - Operand size */
+                     segment_reg      :3;  /* bits 7:9 - Segment register */
+        bool         index_reg_invalid:1,  /* bit 10 - Index register invalid 
*/
+                     base_reg_invalid :1;  /* bit 11 - Base register invalid */
+        unsigned int                  :4,  /* bits 12:15 - Undefined */
+                     reg1             :5,  /* bits 16:20 - Reg1 */
+                                      :3,  /* bits 21:23 - Undefined */
+                     index_reg        :5,  /* bits 24:28 - Index register */
+                                      :3,  /* bits 29:31 - Undefined */
+                     base_reg         :5,  /* bits 32:36 - Base register */
+                                      :3,  /* bits 37:39 - Undefined */
+                     reg2             :5,  /* bits 40:44 - Reg2 */
+                                      :19; /* bits 45:63 - Undefined */
+    };
+} extended_instr_info_t;
+
 #endif /* __ASM_X86_HVM_VMX_VMX_H__ */