[PATCH v5 18/19] x86emul: support AVX10.2-aux {B,H}F{4,6} <-> {B,H}F8 converts

[Jan Beulich <jbeulich@xxxxxxxx>]

Their handling follows that of other convert insns.

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
---
SDE: ???
---
v5: New.

--- a/tools/tests/x86_emulator/evex-disp8.c
+++ b/tools/tests/x86_emulator/evex-disp8.c
@@ -821,7 +821,18 @@ static const struct test avx10_2_128[] =
     INSN(movw, f3, map5, 7e, el, fp16, el),
 };
 
+/*
+ * Element size w is used here in place of b, to have test_one() set EVEX.W.
+ * As those insns don't permit broadcast, using the wrong size is benign.
+ */
 static const struct test avx10_2_aux_all[] = {
+    INSN(cvtbf42hf8,       , map5, 37, vl_2,    b, vl),
+//       cvtbf62hf8,     66, map5, 37,   vl,    w, vl
+    INSN(cvtbf82bf4s,    f3, map5, 3d, vl_2,    b, vl),
+//       cvtbf82bf6s,    f3, map5, 3e,   vl,    w, vl
+//       cvthf62hf8,     66, map5, 37,   vl,    b, vl
+    INSN(cvthf82bf4s,    f3, map5, 3d, vl_2,    w, vl),
+//       cvthf82hf6s,    f3, map5, 3e,   vl,    b, vl
     INSN(pmovssdb,       f3, 0f38, 41, vl_4,    b, vl),
     INSN(unpackb,          , 0f3a, 3d,   vl,    b, vl),
 };
--- a/tools/tests/x86_emulator/predicates.c
+++ b/tools/tests/x86_emulator/predicates.c
@@ -2147,6 +2147,11 @@ static const struct evex {
     { { 0x2f }, 2, T, R, pfx_no, W0, LIG }, /* vcomish */
     { { 0x2f }, 2, T, R, pfx_66, W0, LIG }, /* vcomisbf16 */
     { { 0x2f }, 2, T, R, pfx_f3, W0, LIG }, /* vcomxsh */
+    { { 0x37 }, 2, T, R, pfx_no, W0, Ln }, /* vcvtbf42hf8 */
+    { { 0x37, 0xc0 }, 2, F, N, pfx_66, Wn, Ln }, /* vcvt{b,h}f62hf8 */
+    { { 0x3c, 0xc0 }, 2, F, N, pfx_f3, W0, Ln }, /* vcvthf82hf6s */
+    { { 0x3d }, 2, T, W, pfx_f3, Wn, Ln }, /* vcvt{b,h}f82bf4s */
+    { { 0x3e, 0xc0 }, 2, F, N, pfx_f3, W1, Ln }, /* vcvtbf82bf6s */
     { { 0x51 }, 2, T, R, pfx_no, W0, Ln }, /* vsqrtph */
     { { 0x51 }, 2, T, R, pfx_66, W0, Ln }, /* vsqrtbf16 */
     { { 0x51 }, 2, T, R, pfx_f3, W0, LIG }, /* vsqrtsh */
--- a/xen/arch/x86/x86_emulate/decode.c
+++ b/xen/arch/x86/x86_emulate/decode.c
@@ -1253,9 +1253,10 @@ int x86emul_decode(struct x86_emulate_st
                         opcode |= MASK_INSR(5, X86EMUL_OPC_EXT_MASK);
                         /*
                          * Re-use twobyte_table[] here, for the similarity of
-                         * the entries valid in map 5.
+                         * the entries valid in map 5.  There's always a
+                         * ModR/M byte, though.
                          */
-                        d = twobyte_table[b].desc;
+                        d = twobyte_table[b].desc | ModRM;
                         s->simd_size = twobyte_table[b].size ?: simd_other;
                         break;
 
@@ -1616,8 +1617,17 @@ int x86emul_decode(struct x86_emulate_st
                 break;
 
             case 0x1e: /* vcvthf82ph */
+            case 0x37: /* vcvt{bf4,bf6,hf6}2hf8 */
+            case 0x3c: /* vcvthf82hf6s */
+            case 0x3e: /* vcvtbf82bf6s */
                 d = DstReg | SrcMem | TwoOp;
                 s->simd_size = simd_other;
+                /* Not correct for f6<->f8, but those are register-only. */
+                disp8scale = 3 + s->evex.lr;
+                break;
+
+            case 0x3d: /* vcvt{b,h}f82hf4s */
+                d = DstMem | SrcReg | TwoOp;
                 disp8scale = 3 + s->evex.lr;
                 break;
 
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -8039,6 +8039,29 @@ x86_emulate(
         op_bytes = 8 << evex.lr;
         goto simd_zmm;
 
+    case X86EMUL_OPC_EVEX_F3(5, 0x3d): /* vcvt{b,h}f82bf4s 
[xyz]mm,[xy]mm/m{64,128,256} */
+        generate_exception_if(evex.opmsk, X86_EXC_UD);
+        fallthrough;
+    case X86EMUL_OPC_EVEX   (5, 0x37): /* vcvtbf42hf8 
[xy]mm/m{64,128,256},[xyz]mm{k} */
+        generate_exception_if((evex.w && (b & 2)) || evex.brs, X86_EXC_UD);
+        vcpu_must_have(avx10_2_aux);
+        avx512_vlen_check(false);
+        op_bytes = 8 << evex.lr;
+        fault_suppression = false;
+        goto simd_zmm;
+
+    case X86EMUL_OPC_EVEX_F3(5, 0x3c): /* vcvthf82hf6s [xyz]mm,[xyz]mm */
+    case X86EMUL_OPC_EVEX_F3(5, 0x3e): /* vcvtbf82bf6s [xyz]mm,[xyz]mm */
+        generate_exception_if(evex.w == !(b & 2), X86_EXC_UD);
+        fallthrough;
+    case X86EMUL_OPC_EVEX_66(5, 0x37): /* vcvt{b,h}f62hf8 [xyz]mm,[xyz]mm */
+        generate_exception_if(ea.type != OP_REG || evex.opmsk || evex.brs,
+                              X86_EXC_UD);
+        vcpu_must_have(avx10_2_aux);
+        avx512_vlen_check(false);
+        op_bytes = 1; /* Any non-zero value will do. */
+        goto simd_zmm;
+
     case X86EMUL_OPC_EVEX_66(5, 0x51): /* vsqrtbf16 [xyz]mm/mem,[xyz]mm{k} */
     case X86EMUL_OPC_EVEX_66(5, 0x58): /* vaddbf16 
[xyz]mm/mem,[xyz]mm,[xyz]mm{k} */
     case X86EMUL_OPC_EVEX_66(5, 0x59): /* vmulbf16 
[xyz]mm/mem,[xyz]mm,[xyz]mm{k} */