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Re: [PATCH v1] x86/nestedsvm: honour L2's EFLAGS.IF when L1 clears V_INTR_MASKING


  • To: Chunjie Zhu (朱春杰) <chunjie.zhu@xxxxxxxxxx>
  • From: Ross Lagerwall <ross.lagerwall@xxxxxxxxxx>
  • Date: Tue, 3 Nov 2026 17:07:45 +0000
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  • Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, "jason.andryuk@xxxxxxx" <jason.andryuk@xxxxxxx>, "jbeulich@xxxxxxxx" <jbeulich@xxxxxxxx>, "roger@xxxxxxxxxxxxxx" <roger@xxxxxxxxxxxxxx>, "teddy.astie@xxxxxxxxxx" <teddy.astie@xxxxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
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  • Thread-topic: [PATCH v1] x86/nestedsvm: honour L2's EFLAGS.IF when L1 clears V_INTR_MASKING

> From: Chunjie Zhu (朱春杰) <chunjie.zhu@xxxxxxxxxx>
> Sent: Tuesday, November 03, 2026 10:11
> To: Ross Lagerwall <ross.lagerwall@xxxxxxxxxx>
> Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>; Chunjie Zhu (朱春杰) 
> <chunjie.zhu@xxxxxxxxxx>; jason.andryuk@xxxxxxx <jason.andryuk@xxxxxxx>; 
> jbeulich@xxxxxxxx <jbeulich@xxxxxxxx>; roger@xxxxxxxxxxxxxx 
> <roger@xxxxxxxxxxxxxx>; teddy.astie@xxxxxxxxxx <teddy.astie@xxxxxxxxxx>; 
> xen-devel@xxxxxxxxxxxxxxxxxxxx <xen-devel@xxxxxxxxxxxxxxxxxxxx>
> Subject: Re: [PATCH v1] x86/nestedsvm: honour L2's EFLAGS.IF when L1 clears 
> V_INTR_MASKING
>
>
> On Thu, Oct 29, 2026 at 17:20, Ross Lagerwall wrote:
> > Would it not make sense to check this in nsvm_intr_blocked() instead?
> > There is already a similar (inverse) check there so extending that seems
> > more logical to me.
>
> Thanks for the suggestion, but I think there would be a regression.
>
> nsvm_intr_blocked() has no access to the intack. Per the APM (vol.2,
> section 15.21), V_INTR_MASKING controls whether the masking of interrupts
> (EFLAGS.IF and TPR) is to be virtualized.  That masking only applies to
> maskable external interrupts (PIC/LAPIC/vector).  NMI is not masked by
> IF/TPR, and #MC is an exception, so neither is affected.
>
> With the check moved into nsvm_intr_blocked(), an NMI/#MC aimed at L1
> would be held pending whenever V_INTR_MASKING=0 and L2's IF is clear,
> which would be a regression for L1 hypervisors that intercept NMI/#MC.
>
> So I would prefer to keep the check in the hvm_intsrc_pic/lapic/vector
> case of nestedsvm_vcpu_interrupt(), where the source is known.  If you
> would rather have it in nsvm_intr_blocked(), I can instead pass the
> intack down (changing nhvm_interrupt_blocked()) so that the IF check
> is applied to non-NMI/MCE sources only.

You shouldn't need to pass in more information. nhvm_intr_blocked()
returns a reason for why the interrupt is blocked. It is up to the
caller to decide what to do with it. If the reason is
hvm_intblk_rflags_ie, then it shouldn't block injecting an NMI.
nested_svm_vcpu_interrupt() currently ignores the reason so I think it
is already broken for the more common case where V_INTR_MASKING=1 and
L1's RFLAGS.IF=0.

So I think this wants a fix to nested_svm_vcpu_interrupt() to handle the
reason correctly which fixes the V_INTR_MASKING=1 case, and then a fix
to nsvm_intr_blocked() to handle the V_INTR_MASKING=0 case.

The reason I prefer putting the logic in nsvm_intr_blocked() is that
there are other users of it besides nested_svm_vcpu_interrupt() and the
behaviour should be consistent there too.

Ross

 


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