[PATCH 4/4] x86: tighten PCI-related locking assertions

[Jan Beulich <jbeulich@xxxxxxxx>]

With recent changes the .pi_update_irte() hook as well as
{,un}map_domain_pirq() and allocate_and_map_msi_pirq() won't be called
anymore with the global PCI lock held. Convert the assertions to check for
just the domain's PCI lock.

With that the somewhat ugly ASSERT_PDEV_LIST_IS_READ_LOCKED() isn't used
outside of msi.c anymore, so move the #define there.

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
---
It being just two use sites which remain, we may want to do away with
ASSERT_PDEV_LIST_IS_READ_LOCKED() altogether. Thoughts? (It also isn't
qite clear to me why its #define(s) sit inside an #ifdef: The expression
used ought to be fine to use also in release builds, as it looks.)

--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -419,7 +419,7 @@ static int cf_check vmx_pi_update_irte(c
 
     spin_unlock_irq(&desc->lock);
 
-    ASSERT_PDEV_LIST_IS_READ_LOCKED(msi_desc->dev->domain);
+    ASSERT(rw_is_locked(&msi_desc->dev->domain->pci_lock));
 
     rc = iommu_update_ire_from_msi(msi_desc, &msg);
     if ( rc > 0 )
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2250,7 +2250,7 @@ int map_domain_pirq(
         struct pci_dev *pdev;
         unsigned int nr = 0;
 
-        ASSERT_PDEV_LIST_IS_READ_LOCKED(d);
+        ASSERT(rw_is_locked(&d->pci_lock));
 
         ret = -ENODEV;
         if ( !cpu_has_apic )
@@ -2410,7 +2410,7 @@ int unmap_domain_pirq(struct domain *d,
     if ( (pirq < 0) || (pirq >= d->nr_pirqs) )
         return -EINVAL;
 
-    ASSERT_PDEV_LIST_IS_READ_LOCKED(d);
+    ASSERT(rw_is_locked(&d->pci_lock));
     ASSERT(rw_is_write_locked(&d->event_lock));
 
     info = pirq_info(d, pirq);
@@ -3021,7 +3021,7 @@ int allocate_and_map_msi_pirq(struct dom
 {
     int irq = -1, pirq, ret;
 
-    ASSERT_PDEV_LIST_IS_READ_LOCKED(d);
+    ASSERT(rw_is_locked(&d->pci_lock));
 
     switch ( type )
     {
--- a/xen/arch/x86/msi.c
+++ b/xen/arch/x86/msi.c
@@ -737,6 +737,19 @@ static uint64_t read_pci_mem_bar(const s
     return (addr & PCI_BASE_ADDRESS_MEM_MASK) + disp;
 }
 
+#ifndef NDEBUG
+/*
+ * Check to ensure there will be no changes to the entries in d->pdev_list (but
+ * not the contents of each entry).
+ * This check is not suitable for protecting other state or critical regions.
+ */
+#define ASSERT_PDEV_LIST_IS_READ_LOCKED(d)                               \
+        /* NB: d may be evaluated multiple times, or not at all */       \
+        ASSERT(pcidevs_locked() || ((d) && rw_is_locked(&(d)->pci_lock)))
+#else
+#define ASSERT_PDEV_LIST_IS_READ_LOCKED(d) ((void)(d))
+#endif
+
 /**
  * msix_capability_init - configure device's MSI-X capability
  * @dev: pointer to the pci_dev data structure of MSI-X device function
--- a/xen/include/xen/pci.h
+++ b/xen/include/xen/pci.h
@@ -204,19 +204,6 @@ static always_inline bool pcidevs_tryloc
     return lock_evaluate_nospec(pcidevs_trylock_unsafe());
 }
 
-#ifndef NDEBUG
-/*
- * Check to ensure there will be no changes to the entries in d->pdev_list (but
- * not the contents of each entry).
- * This check is not suitable for protecting other state or critical regions.
- */
-#define ASSERT_PDEV_LIST_IS_READ_LOCKED(d)                               \
-        /* NB: d may be evaluated multiple times, or not at all */       \
-        ASSERT(pcidevs_locked() || ((d) && rw_is_locked(&(d)->pci_lock)))
-#else
-#define ASSERT_PDEV_LIST_IS_READ_LOCKED(d) ((void)(d))
-#endif
-
 bool pci_known_segment(u16 seg);
 bool pci_device_detect(pci_sbdf_t sbdf);
 int scan_pci_devices(void);