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[PATCH] xen/x86/svm: Apply the virtual-8086 IOPL check to INT n only


  • To: <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: Stefano Stabellini <stefano.stabellini@xxxxxxx>
  • Date: Tue, 20 Oct 2026 15:41:23 -0700
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  • Delivery-date: Tue, 20 Oct 2026 22:41:41 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

In virtual-8086 mode with IOPL < 3, INT n raises #GP(0).  INT1, INT3
and INTO are not affected. They are delivered normally.

svm_emul_swint_injection() applies the check to all of them, so an ICEBP
raises #GP instead of #DB.  It also reports the IDT entry in the #GP
error code instead of 0.

Limit the check to INT n and use error code 0.

Signed-off-by: Stefano Stabellini <stefano.stabellini@xxxxxxx>
---
 xen/arch/x86/hvm/svm/svm.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index 71e48351f2..df74531d1a 100644
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -1153,9 +1153,12 @@ static void svm_emul_swint_injection(struct x86_event 
*event)
      * 32bit OS.  Someone with many TUITs can see about reading the TSS
      * Software Interrupt Redirection bitmap.
      */
-    if ( (regs->eflags & X86_EFLAGS_VM) &&
+    if ( type == X86_ET_SW_INT && (regs->eflags & X86_EFLAGS_VM) &&
          MASK_EXTR(regs->eflags, X86_EFLAGS_IOPL) != 3 )
+    {
+        ec = 0;
         goto raise_exception;
+    }
 
     /*
      * Read all 8/16 bytes so the idtr limit check is applied properly to
-- 
2.43.0




 


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