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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH v7 3/4] xen/riscv: panic if the device tree advertises neither Svade nor Svadu
On 10/16/26 5:34 PM, Baptiste Le Duc wrote: p2m_set_pte_flags() presets the A/D bits of G-stage PTEs only when RISCV_ISA_EXT_svade is set, which is correct only if the device tree is. The privileged spec allows exactly two schemes for updating the PTE A and D bits: hardware sets them on access and on write, or accessing a page whose A and/or D bit is clear raises a page fault so that software can set them (ratified as Svade). Every implementation uses one of them, but platforms designed before Svade and Svadu were ratified, such as the HiFive Premier P550, may advertise neither. Xen then cannot tell which scheme is in effect, so rather than guess, panic in riscv_fill_hwcap() when the device tree advertises neither Svade nor Svadu, so that the device tree gets fixed. Add Svadu to the known ISA extensions so it can be told apart from Svade. The comment above the enum asks for new extensions to go at the bottom to avoid shuffling, a leftover from Linux where the IDs were macros with explicit values. Nothing depends on the enum values, so have the comment say that multi-letter extensions follow the order of riscv_isa_ext[]. Suggested-by: Jan Beulich <jbeulich@xxxxxxxx> Assisted-by: Claude:claude-opus-5-5 Signed-off-by: Baptiste Le Duc <baptiste.le-duc@xxxxxxxxxx> Reviewed-by: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx> ~ Oleksii
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