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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH v3 07/39] xen/riscv: introduce CPU_NONE
Introduce CPU_NONE, a CPU number which doesn't identify any physical
CPU, to be used wherever a pCPU has to be recorded but there may be
none.
Its first user is vsfile_cpu in struct vimsic_state, which records the
pCPU whose h/w guest interrupt file backs the vCPU's IMSIC VS-file.
NR_CPUS has been used there as the value meaning that there is no such
pCPU, i.e. that the s/w VS-file is in use. NR_CPUS is however an upper
bound rather than a "no CPU" marker, and it already carries other
meanings: hartid_to_cpuid() returns it for a hart Xen doesn't know, and
pcpu_info[] uses it for an entry whose processor_id isn't valid yet.
Use CPU_NONE for vsfile_cpu instead, so that the s/w VS-file case can't
be mistaken for any of those.
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>
---
CPU_NONE is also used later in this series:
- "xen/riscv: implement virtual APLIC MMIO emulation" checks vsfile_cpu
against it to tell whether the target vCPU has a h/w guest interrupt
file.
- "xen/riscv: implement vCPU context switching" initialises the new
arch_vcpu.last_cpu with it, and "xen/riscv: handle the case when no
vCPU migration is needed" checks last_cpu against it.
- "xen/riscv: remap interrupts to new IMSIC VS-file", "xen/riscv: save
and clear the old IMSIC VS-file on vCPU migration" and "xen/riscv:
introduce IMSIC h/w interrupt file attaching to vcpu" use it for
vsfile_cpu of the s/w IMSIC VS-file.
---
Changes in v3:
- New patch.
---
---
xen/arch/riscv/imsic.c | 4 ++--
xen/arch/riscv/include/asm/config.h | 3 +++
xen/arch/riscv/include/asm/imsic.h | 2 +-
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c
index 44b8640ea39a..402b2f14f591 100644
--- a/xen/arch/riscv/imsic.c
+++ b/xen/arch/riscv/imsic.c
@@ -357,9 +357,9 @@ int cf_check vcpu_imsic_init(struct vcpu *v)
/*
* xvzalloc() already cleared the context, so guest_file_id == 0, i.e. the
* always-available s/w IMSIC VS-file. Only vsfile_cpu needs an explicit
- * initializer as its s/w VS-file value is NR_CPUS rather than 0.
+ * initializer as its s/w VS-file value is CPU_NONE rather than 0.
*/
- imsic_state->vsfile_cpu = NR_CPUS;
+ imsic_state->vsfile_cpu = CPU_NONE;
v->arch.vimsic_state = imsic_state;
diff --git a/xen/arch/riscv/include/asm/config.h
b/xen/arch/riscv/include/asm/config.h
index fd69057826e1..fb6203a7d502 100644
--- a/xen/arch/riscv/include/asm/config.h
+++ b/xen/arch/riscv/include/asm/config.h
@@ -136,6 +136,9 @@
#define OPT_CONSOLE_STR "dtuart"
#define INVALID_VCPU_ID MAX_VIRT_CPUS
+/* A CPU number which doesn't identify any physical CPU. */
+#define CPU_NONE (~0U)
+
/* Linkage for RISCV */
#ifdef __ASSEMBLER__
#define CODE_FILL /* empty */
diff --git a/xen/arch/riscv/include/asm/imsic.h
b/xen/arch/riscv/include/asm/imsic.h
index 2425430ed116..6baadc008d81 100644
--- a/xen/arch/riscv/include/asm/imsic.h
+++ b/xen/arch/riscv/include/asm/imsic.h
@@ -71,7 +71,7 @@ struct vimsic_state {
*/
unsigned int guest_file_id;
/*
- * s/w IMSIC VS-file -> vsfile_cpu == NR_CPUS
+ * s/w IMSIC VS-file -> vsfile_cpu == CPU_NONE
* h/w IMSIC VS-file -> vsfile_cpu < NR_CPUS
*/
unsigned int vsfile_cpu;
--
2.55.0
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