[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH 1/3] vm_event: svm: Don't BUG() when enabling intercept on hypervisor MSR


  • To: Teddy Astie <teddy.astie@xxxxxxxxxx>
  • From: Jan Beulich <jbeulich@xxxxxxxx>
  • Date: Wed, 30 Sep 2026 16:01:33 +0200
  • Authentication-results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=suse.com header.i="@suse.com" header.h="Content-Transfer-Encoding:Content-Type:In-Reply-To:Autocrypt:From:Content-Language:References:Cc:To:Subject:User-Agent:MIME-Version:Date:Message-ID"
  • Autocrypt: addr=jbeulich@xxxxxxxx; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL
  • Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Roger Pau Monné <roger@xxxxxxxxxxxxxx>, Jason Andryuk <jason.andryuk@xxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
  • Delivery-date: Wed, 30 Sep 2026 14:01:39 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 30.09.2026 15:39, Teddy Astie wrote:
> Le 30/09/2026 à 15:08, Jan Beulich a écrit :
>> On 30.09.2026 14:57, Teddy Astie wrote:
>>> Le 30/09/2026 à 11:16, Jan Beulich a écrit :
>>>> On 24.09.2026 13:56, Teddy Astie wrote:
>>>>> svm_msrbits() only cover MSRs in the ranges specified in APM and returns
>>>>> NULL for all the other ones (i.e hypervisor range), which triggers the
>>>>> BUG_ON() that follows.
>>>>>
>>>>> APM specifies that MSR outside the architectural and AMD specific ranges
>>>>> are unconditionally intercepted, hence don't require any specific handling
>>>>> by SVM logic, fix this by ignoring cases when msr_bit is NULL.
>>>>>
>>>>> This is only reachable with CONFIG_VM_EVENT using 
>>>>> XEN_DOMCTL_MONITOR_EVENT_MOV_TO_MSR
>>>>> to configure a MSR intercept in the hypervisor range 
>>>>> (0x40000000–0x40001fff).
>>>>
>>>> Hence imo it is wrong to drop the sanity check altogether. See below.
>>>>
>>>> Also, nit: Description lines want limiting to 75 chars.
>>>>
>>>>> --- a/xen/arch/x86/hvm/svm/svm.c
>>>>> +++ b/xen/arch/x86/hvm/svm/svm.c
>>>>> @@ -237,7 +237,9 @@ void svm_intercept_msr(struct vcpu *v, uint32_t msr, 
>>>>> int flags)
>>>>>        const struct domain *d = v->domain;
>>>>>    
>>>>>        msr_bit = svm_msrbit(v->arch.hvm.svm.msrpm, msr);
>>>>> -    BUG_ON(msr_bit == NULL);
>>>>> +    if ( msr_bit == NULL )
>>>>> +        return;
>>>>
>>>> Imo the function wants to return an error here, which all callers
>>>> except the one you mention check. I.e. the BUG_ON() would be moved
>>>> out to most callers (alternatively the one caller could range-check
>>>> the MSR itself). Right now for introspection intercepts can only be
>>>> enabled, hence why for that use "all other MSRs are intercepted
>>>> anyway" is fine. Suppose the inverse operation would be possible as
>>>> well: Then indicating "success" back to the caller when accesses to
>>>> the requested MSR are still intercepted would be wrong.
>>>>
>>>
>>> IIUC, you're suggesting to report to the caller that the hardware
>>> doesn't cover it, such as we can detect cases where we accidentally pass
>>> a bogus MSR index that is outside of hardware ranges.
>>>
>>> In the VM introspection case, we could ignore it since we're only
>>> interested on intercepts, where outside hardware ranges would always be
>>> intercepted.
>>>
>>> Did I got the idea correctly ?
>>
>> Yes. Just that the more I think about it, the more I prefer the alternative
>> that I also mentioned. Not the least because it's less churn.
>>
> 
> One of the idea would be to check monitored_msr() (somewhat like what 
> you proposed for VMX) so that the VM event case is covered, but we 
> ASSERT (or BUG_ON ?) in the other cases if we pass a unexpected MSR to 
> this function.
> 
> diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
> index 71e48351f2..be866b9055 100644
> --- a/xen/arch/x86/hvm/svm/svm.c
> +++ b/xen/arch/x86/hvm/svm/svm.c
> @@ -236,7 +236,12 @@ void svm_intercept_msr(struct vcpu *v, uint32_t 
> msr, int flags)
>       const struct domain *d = v->domain;
> 
>       msr_bit = svm_msrbit(v->arch.hvm.svm.msrpm, msr);
> -    BUG_ON(msr_bit == NULL);
> +    if ( !msr_bit )
> +    {
> +        ASSERT(monitored_msr(d, msr));
> +        return;
> +    }

Just that ASSERT() only covers debug builds and BUG_ON() is too heavy on
release ones: There's no reason to kill an entire host because of this.

Jan



 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.