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Re: [PATCH v2 19/39] xen/riscv: implement trap redirection to a guest
- To: Baptiste Le Duc <baptiste.le-duc@xxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Tue, 8 Sep 2026 17:58:04 +0200
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- Cc: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx, Romain Caritey <Romain.Caritey@xxxxxxxxxxxxx>, Zheng Zhang <zhangzheng@xxxxxxxxxxx>, Alistair Francis <alistair.francis@xxxxxxx>, Connor Davis <connojdavis@xxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Anthony PERARD <anthony.perard@xxxxxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Julien Grall <julien@xxxxxxx>, Roger Pau Monné <roger@xxxxxxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>
- Delivery-date: Tue, 08 Sep 2026 15:58:10 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 08.09.2026 17:47, Baptiste Le Duc wrote:
> On 2026-09-08 17:05 +0200, Jan Beulich wrote:
>> On 08.09.2026 16:58, Oleksii Kurochko wrote:
>>> On 9/8/26 12:01 PM, Oleksii Kurochko wrote:
>>>> On 9/7/26 5:57 PM, Baptiste Le Duc wrote:
>>>>>> --- a/xen/arch/riscv/include/asm/riscv_encoding.h
>>>>>> +++ b/xen/arch/riscv/include/asm/riscv_encoding.h
>>>>>> @@ -109,6 +109,12 @@
>>>>>> #define SIP_SSIP MIP_SSIP
>>>>>> #define SIP_STIP MIP_STIP
>>>>>> +/* stvec/vstvec: MODE is bits [1:0], BASE is bits [XLEN-1:2] */
>>>>>> +#define STVEC_MODE_MASK _UL(0x3)
>>>>>> +#define STVEC_MODE_DIRECT _UL(0x0)
>>>>>> +#define STVEC_MODE_VECTORED _UL(0x1)
>>>>>> +#define STVEC_BASE_MASK (~STVEC_MODE_MASK)
>>>>> Nit: STVEC_MODE_DIRECT and STVEC_MODE_VECTORED aren't used anywhere in
>>>>> this patch (only STVEC_BASE_MASK is). Either use them where you decide
>>>>> exceptions always target BASE regardless of MODE, or drop them until a
>>>>> patch that needs them.
>>>>
>>>> IMO it is fine to introduce *_DIRECT/VECORED here as they are used
>>>> implicitly through STVEC_BASE_MASK and thereby it will be better to
>>>> introduce them here now instead of open-code them and then just update
>>>> STVEC_BASE_MASK again when *_DIRECT/VECORED will be re-introduced.
>>>>
>>>
>>> Oh, sorry, you are right. STVEC_MODE_DIRECT and STVEC_MODE_VECTORED are
>>> really not used here (in this implementation). I planned to do:
>>>
>>> #define STVEC_MODE_MASK (STVEC_MODE_DIRECT | STVEC_MODE_VECTORED)
>>>
>>> But I missed to do in that way.
>>>
>>> I will update the defintion of STVEC_MODE_MASK in suggested above way.
>>
>> But that's yield a mask value of 1, when you want it to be 3. That ORing
>> together looks bogus to me anyway.
>>
> Yes I agree. It might be enough, for the moment, to only keep #define
> STVEC_MODE_MASK _UL(3) and drop the others defines (even STVEC_BASE_MASK as
> Jan
> mentioned the comment in the caller is already precise enough).
To me having STVEC_MODE_MASK without at least one of
STVEC_MODE_{DIRECT,VECTORED} would feel odd / incomplete.
Jan
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