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Re: [PATCH v2 2/3] x86/viridian: Implement synthetic timer direct mode
- To: Roger Pau Monné <roger@xxxxxxxxxxxxxx>, Ross Lagerwall <ross.lagerwall@xxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Mon, 7 Sep 2026 10:57:06 +0200
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- Cc: xen-devel@xxxxxxxxxxxxxxxxxxxx, Paul Durrant <paul@xxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Teddy Astie <teddy.astie@xxxxxxxxxx>, Anthony PERARD <anthony.perard@xxxxxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Julien Grall <julien@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>
- Delivery-date: Mon, 07 Sep 2026 08:57:13 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 04.09.2026 17:15, Roger Pau Monné wrote:
> On Fri, Sep 04, 2026 at 03:15:15PM +0100, Ross Lagerwall wrote:
>> @@ -368,11 +379,18 @@ int viridian_time_wrmsr(struct vcpu *v, uint32_t idx,
>> uint64_t val)
>> if ( !(viridian_feature_mask(d) & HVMPV_stimer) )
>> return X86EMUL_EXCEPTION;
>>
>> + new.as_uint64 = val;
>> + if ( new.direct_mode &&
>> + !(viridian_feature_mask(d) & HVMPV_stimer_direct) )
>> + return X86EMUL_EXCEPTION;
>
> Do we know whether native HyperV also injects a #GP in case of setting
> reserved bits on the register?
>
> To keep the previous behavior, should Xen silently ignore the setting
> when not supported, like it did in the past?
I think so, yes (and I thought I had expressed this also in the v1 comments,
but apparently not, or not sufficiently clearly).
Jan
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