Re: Re: Re: [PATCH v4] x86/nSVM: Check injected event consistency

[Abdelkareem Abdelsaamad <abdelkareem.abdelsaamad@xxxxxxxxxx>]

>>> @@ -320,6 +320,44 @@ void svm_vmcb_dump(const char *from, const struct 
>>> vmcb_struct *vmcb)
>>>      svm_dump_sel("  TR", &vmcb->tr);
>>>  }
>>>  
>>> +static bool is_valid_injected_exception_vector(const struct vmcb_struct 
>>> *vmcb,
>>> +    uint8_t vmcb_injected_vector)
>>> +{
>>> +    switch ( vmcb_injected_vector )
>>> +    {
>>> +    case X86_EXC_DE:
>>> +    case X86_EXC_DB:
>>> +    case X86_EXC_BP:
>>> +    case X86_EXC_UD:
>>> +    case X86_EXC_NM:
>>> +    case X86_EXC_DF:
>>> +    case X86_EXC_TS:
>>> +    case X86_EXC_NP:
>>> +    case X86_EXC_SS:
>>> +    case X86_EXC_GP:
>>> +    case X86_EXC_PF:
>>> +    case X86_EXC_MF:
>>> +    case X86_EXC_AC:
>>> +    case X86_EXC_MC:
>>
>>Is #MC valid to inject without CR4.MCE set?
>The testing I performed (see previous comment) does not show that set CR4.MCE
>is required for the valid injection.
>>> +    case X86_EXC_XM:
>>
>>As before: Doesn't #XM (AMD: #XF) require CR4.OSXMMEXCPT to be set?
>The testing I performed (see previous comment) does not show that set CR4.MCE
>is required for the valid injection.
I meant ..does not show that set CR4.OSXMMEXCPT is required.
>>
>>Again as before: Is #SX really permitted without any constraints? You did
>>reply to both comments on v3, but that outcome isn't reflected here. The
>>more that what you said there could equally apply ...
>The testing I performed (see the first comment) does not show that set CR4.MCE
>is required for the valid injection.
I meant ..does not show that any CR4 bit is required.